libretiny: wire copy_files() through each target_platform module

target_platform for LibreTiny devices is one of bk72xx, rtl87xx, ln882x
(not "libretiny" itself), so writer.py's platform-dispatched copy_files()
call was not reaching libretiny.copy_files(). That left the pre-link
patch_linker.py script absent from the build dir, so PlatformIO failed
with "missing SConscript file 'patch_linker.py'".

Add a delegating copy_files() to each generated sub-component and to
generate_components.py so regeneration keeps them in sync.
This commit is contained in:
J. Nick Koston
2026-04-15 13:46:37 -10:00
parent 3e5c4fd603
commit c1ef3cab37
5 changed files with 25 additions and 3 deletions
+5
View File
@@ -65,3 +65,8 @@ async def to_code(config):
@pins.PIN_SCHEMA_REGISTRY.register("bk72xx", PIN_SCHEMA)
async def pin_to_code(config):
return await libretiny.gpio.component_pin_to_code(config)
# Called by writer.py; delegates to the shared libretiny implementation.
def copy_files() -> None:
libretiny.copy_files()
+5 -3
View File
@@ -467,9 +467,11 @@ async def component_to_code(config):
# it for project source files only. GCC uses the last -O flag.
build_src_flags += " -Os"
cg.add_platformio_option("build_src_flags", build_src_flags)
# Patch the linker script to add a ".sram.text" output section so IRAM_ATTR
# (defined in esphome/core/hal.h) places code in SRAM on BK72xx and LN882H.
# No-op on RTL8710B/RTL8720C whose stock linker scripts already provide it.
# BK72xx linker templates mark the SRAM region as (rw!x), which blocks the
# linker from placing executable code in .data — the section IRAM_ATTR
# targets on BK72xx (see esphome/core/hal.h). This pre-link hook flips the
# flag to (rwx) once LibreTiny has written the processed .ld file(s) into
# the build dir. No-op on every other family.
cg.add_platformio_option("extra_scripts", ["pre:patch_linker.py"])
# dummy version code
cg.add_define("USE_ARDUINO_VERSION_CODE", cg.RawExpression("VERSION_CODE(0, 0, 0)"))
@@ -79,6 +79,11 @@ async def to_code(config):
@pins.PIN_SCHEMA_REGISTRY.register("{COMPONENT_LOWER}", PIN_SCHEMA)
async def pin_to_code(config):
return await libretiny.gpio.component_pin_to_code(config)
# Called by writer.py; delegates to the shared libretiny implementation.
def copy_files() -> None:
libretiny.copy_files()
'''
BASE_CODE_BOARDS = '''
+5
View File
@@ -65,3 +65,8 @@ async def to_code(config):
@pins.PIN_SCHEMA_REGISTRY.register("ln882x", PIN_SCHEMA)
async def pin_to_code(config):
return await libretiny.gpio.component_pin_to_code(config)
# Called by writer.py; delegates to the shared libretiny implementation.
def copy_files() -> None:
libretiny.copy_files()
+5
View File
@@ -65,3 +65,8 @@ async def to_code(config):
@pins.PIN_SCHEMA_REGISTRY.register("rtl87xx", PIN_SCHEMA)
async def pin_to_code(config):
return await libretiny.gpio.component_pin_to_code(config)
# Called by writer.py; delegates to the shared libretiny implementation.
def copy_files() -> None:
libretiny.copy_files()