diff --git a/esphome/components/bk72xx/__init__.py b/esphome/components/bk72xx/__init__.py
index 7fed742d2e..3ffab0f3a5 100644
--- a/esphome/components/bk72xx/__init__.py
+++ b/esphome/components/bk72xx/__init__.py
@@ -65,3 +65,8 @@ async def to_code(config):
 @pins.PIN_SCHEMA_REGISTRY.register("bk72xx", PIN_SCHEMA)
 async def pin_to_code(config):
     return await libretiny.gpio.component_pin_to_code(config)
+
+
+# Called by writer.py; delegates to the shared libretiny implementation.
+def copy_files() -> None:
+    libretiny.copy_files()
diff --git a/esphome/components/libretiny/__init__.py b/esphome/components/libretiny/__init__.py
index 0635e5b788..70354843c1 100644
--- a/esphome/components/libretiny/__init__.py
+++ b/esphome/components/libretiny/__init__.py
@@ -467,9 +467,11 @@ async def component_to_code(config):
         # it for project source files only. GCC uses the last -O flag.
         build_src_flags += " -Os"
     cg.add_platformio_option("build_src_flags", build_src_flags)
-    # Patch the linker script to add a ".sram.text" output section so IRAM_ATTR
-    # (defined in esphome/core/hal.h) places code in SRAM on BK72xx and LN882H.
-    # No-op on RTL8710B/RTL8720C whose stock linker scripts already provide it.
+    # BK72xx linker templates mark the SRAM region as (rw!x), which blocks the
+    # linker from placing executable code in .data — the section IRAM_ATTR
+    # targets on BK72xx (see esphome/core/hal.h). This pre-link hook flips the
+    # flag to (rwx) once LibreTiny has written the processed .ld file(s) into
+    # the build dir. No-op on every other family.
     cg.add_platformio_option("extra_scripts", ["pre:patch_linker.py"])
     # dummy version code
     cg.add_define("USE_ARDUINO_VERSION_CODE", cg.RawExpression("VERSION_CODE(0, 0, 0)"))
diff --git a/esphome/components/libretiny/generate_components.py b/esphome/components/libretiny/generate_components.py
index 41b4389446..d5437895a6 100644
--- a/esphome/components/libretiny/generate_components.py
+++ b/esphome/components/libretiny/generate_components.py
@@ -79,6 +79,11 @@ async def to_code(config):
 @pins.PIN_SCHEMA_REGISTRY.register("{COMPONENT_LOWER}", PIN_SCHEMA)
 async def pin_to_code(config):
     return await libretiny.gpio.component_pin_to_code(config)
+
+
+# Called by writer.py; delegates to the shared libretiny implementation.
+def copy_files() -> None:
+    libretiny.copy_files()
 '''
 
 BASE_CODE_BOARDS = '''
diff --git a/esphome/components/ln882x/__init__.py b/esphome/components/ln882x/__init__.py
index 5c637bdf62..9c91827522 100644
--- a/esphome/components/ln882x/__init__.py
+++ b/esphome/components/ln882x/__init__.py
@@ -65,3 +65,8 @@ async def to_code(config):
 @pins.PIN_SCHEMA_REGISTRY.register("ln882x", PIN_SCHEMA)
 async def pin_to_code(config):
     return await libretiny.gpio.component_pin_to_code(config)
+
+
+# Called by writer.py; delegates to the shared libretiny implementation.
+def copy_files() -> None:
+    libretiny.copy_files()
diff --git a/esphome/components/rtl87xx/__init__.py b/esphome/components/rtl87xx/__init__.py
index 6fd750d51e..a3b1dba4f2 100644
--- a/esphome/components/rtl87xx/__init__.py
+++ b/esphome/components/rtl87xx/__init__.py
@@ -65,3 +65,8 @@ async def to_code(config):
 @pins.PIN_SCHEMA_REGISTRY.register("rtl87xx", PIN_SCHEMA)
 async def pin_to_code(config):
     return await libretiny.gpio.component_pin_to_code(config)
+
+
+# Called by writer.py; delegates to the shared libretiny implementation.
+def copy_files() -> None:
+    libretiny.copy_files()