Merge branch 'dev' into i2c-write-registers-migrate

esphome/components/aic3204/aic3204.cpp

@@ -14,80 +14,80 @@ ESPHOME_LOG_TAG(TAG, "aic3204");
     return; \
   }
 
+static constexpr i2c::I2CRegValue AIC3204_INIT[] PROGMEM = {
+    // Set register page to 0
+    {AIC3204_PAGE_CTRL, 0x00},
+    // Initiate SW reset (PLL is powered off as part of reset)
+    {AIC3204_SW_RST, 0x01},
+    // *** Program clock settings ***
+    // Default is CODEC_CLKIN is from MCLK pin. Don't need to change this.
+    // MDAC*NDAC*FOSR*48Khz = mClk (24.576 MHz when the XMOS is expecting 48kHz audio)
+    // (See page 51 of https://www.ti.com/lit/ml/slaa557/slaa557.pdf)
+    // We do need MDAC*DOSR/32 >= the resource compute level for the processing block
+    // So here 2*128/32 = 8, which is equal to processing block 1 's resource compute
+    // See page 5 of https://www.ti.com/lit/an/slaa404c/slaa404c.pdf for the workflow
+    // for determining these settings.
+    // Power up NDAC and set to 2
+    {AIC3204_NDAC, 0x82},
+    // Power up MDAC and set to 2
+    {AIC3204_MDAC, 0x82},
+    // Program DOSR = 128
+    {AIC3204_DOSR, 0x80},
+    // Set Audio Interface Config: I2S, 32 bits, DOUT always driving
+    {AIC3204_CODEC_IF, 0x30},
+    // For I2S Firmware only, set SCLK/MFP3 pin as Audio Data In
+    {AIC3204_SCLK_MFP3, 0x02},
+    {AIC3204_AUDIO_IF_4, 0x01},
+    {AIC3204_AUDIO_IF_5, 0x01},
+    // Program the DAC processing block to be used - PRB_P1
+    {AIC3204_DAC_SIG_PROC, 0x01},
+    // *** Select Page 1 ***
+    {AIC3204_PAGE_CTRL, 0x01},
+    // Enable the internal AVDD_LDO:
+    {AIC3204_LDO_CTRL, 0x09},
+    // *** Program Analog Blocks ***
+    // Disable Internal Crude AVdd in presence of external AVdd supply or before powering up internal AVdd LDO
+    {AIC3204_PWR_CFG, 0x08},
+    // Enable Master Analog Power Control
+    {AIC3204_LDO_CTRL, 0x01},
+    // Page 125: Common mode control register, set d6 to 1 to make the full chip common mode = 0.75 v
+    // We are using the internal AVdd regulator with a nominal output of 1.72 V (see LDO_CTRL_REGISTER on page 123)
+    // Page 86 says to only set the common mode voltage to 0.9 v if AVdd >= 1.8... but it isn't on our hardware
+    // We also adjust the HPL and HPR gains to -2dB gian later in this config flow compensate (see page 47)
+    // (All pages refer to the TLV320AIC3204 Application Reference Guide)
+    {AIC3204_CM_CTRL, 0x40},
+    // *** Set PowerTune Modes ***
+    // Set the Left & Right DAC PowerTune mode to PTM_P3/4. Use Class-AB driver.
+    {AIC3204_PLAY_CFG1, 0x00},
+    {AIC3204_PLAY_CFG2, 0x00},
+    // Set the REF charging time to 40ms
+    {AIC3204_REF_STARTUP, 0x01},
+    // HP soft stepping settings for optimal pop performance at power up
+    // Rpop used is 6k with N = 6 and soft step = 20usec. This should work with 47uF coupling
+    // capacitor. Can try N=5,6 or 7 time constants as well. Trade-off delay vs “pop” sound.
+    {AIC3204_HP_START, 0x25},
+    // Route Left DAC to HPL
+    {AIC3204_HPL_ROUTE, 0x08},
+    // Route Right DAC to HPR
+    {AIC3204_HPR_ROUTE, 0x08},
+    // Route Left DAC to LOL
+    {AIC3204_LOL_ROUTE, 0x08},
+    // Route Right DAC to LOR
+    {AIC3204_LOR_ROUTE, 0x08},
+    // Unmute HPL and set gain to -2dB (see comment before configuring the AIC3204_CM_CTRL register)
+    {AIC3204_HPL_GAIN, 0x3e},
+    // Unmute HPR and set gain to -2dB (see comment before configuring the AIC3204_CM_CTRL register)
+    {AIC3204_HPR_GAIN, 0x3e},
+    // Unmute LOL and set gain to 0dB
+    {AIC3204_LOL_DRV_GAIN, 0x00},
+    // Unmute LOR and set gain to 0dB
+    {AIC3204_LOR_DRV_GAIN, 0x00},
+    // Power up HPL and HPR, LOL and LOR drivers
+    {AIC3204_OP_PWR_CTRL, 0x3C},
+};
+
 void AIC3204::setup() {
-  // Set register page to 0
-  ERROR_CHECK(this->write_byte(AIC3204_PAGE_CTRL, 0x00), "Set page 0 failed");
-  // Initiate SW reset (PLL is powered off as part of reset)
-  ERROR_CHECK(this->write_byte(AIC3204_SW_RST, 0x01), "Software reset failed");
-  // *** Program clock settings ***
-  // Default is CODEC_CLKIN is from MCLK pin. Don't need to change this.
-  // MDAC*NDAC*FOSR*48Khz = mClk (24.576 MHz when the XMOS is expecting 48kHz audio)
-  // (See page 51 of https://www.ti.com/lit/ml/slaa557/slaa557.pdf)
-  // We do need MDAC*DOSR/32 >= the resource compute level for the processing block
-  // So here 2*128/32 = 8, which is equal to processing block 1 's resource compute
-  // See page 5 of https://www.ti.com/lit/an/slaa404c/slaa404c.pdf for the workflow
-  // for determining these settings.
-
-  // Power up NDAC and set to 2
-  ERROR_CHECK(this->write_byte(AIC3204_NDAC, 0x82), "Set NDAC failed");
-  // Power up MDAC and set to 2
-  ERROR_CHECK(this->write_byte(AIC3204_MDAC, 0x82), "Set MDAC failed");
-  // Program DOSR = 128
-  ERROR_CHECK(this->write_byte(AIC3204_DOSR, 0x80), "Set DOSR failed");
-  // Set Audio Interface Config: I2S, 32 bits, DOUT always driving
-  ERROR_CHECK(this->write_byte(AIC3204_CODEC_IF, 0x30), "Set CODEC_IF failed");
-  // For I2S Firmware only, set SCLK/MFP3 pin as Audio Data In
-  ERROR_CHECK(this->write_byte(AIC3204_SCLK_MFP3, 0x02), "Set SCLK/MFP3 failed");
-  ERROR_CHECK(this->write_byte(AIC3204_AUDIO_IF_4, 0x01), "Set AUDIO_IF_4 failed");
-  ERROR_CHECK(this->write_byte(AIC3204_AUDIO_IF_5, 0x01), "Set AUDIO_IF_5 failed");
-  // Program the DAC processing block to be used - PRB_P1
-  ERROR_CHECK(this->write_byte(AIC3204_DAC_SIG_PROC, 0x01), "Set DAC_SIG_PROC failed");
-
-  // *** Select Page 1 ***
-  ERROR_CHECK(this->write_byte(AIC3204_PAGE_CTRL, 0x01), "Set page 1 failed");
-  // Enable the internal AVDD_LDO:
-  ERROR_CHECK(this->write_byte(AIC3204_LDO_CTRL, 0x09), "Set LDO_CTRL failed");
-  // *** Program Analog Blocks ***
-  // Disable Internal Crude AVdd in presence of external AVdd supply or before powering up internal AVdd LDO
-  ERROR_CHECK(this->write_byte(AIC3204_PWR_CFG, 0x08), "Set PWR_CFG failed");
-  // Enable Master Analog Power Control
-  ERROR_CHECK(this->write_byte(AIC3204_LDO_CTRL, 0x01), "Set LDO_CTRL failed");
-  // Page 125: Common mode control register, set d6 to 1 to make the full chip common mode = 0.75 v
-  // We are using the internal AVdd regulator with a nominal output of 1.72 V (see LDO_CTRL_REGISTER on page 123)
-  // Page 86 says to only set the common mode voltage to 0.9 v if AVdd >= 1.8... but it isn't on our hardware
-  // We also adjust the HPL and HPR gains to -2dB gian later in this config flow compensate (see page 47)
-  // (All pages refer to the TLV320AIC3204 Application Reference Guide)
-  ERROR_CHECK(this->write_byte(AIC3204_CM_CTRL, 0x40), "Set CM_CTRL failed");
-  // *** Set PowerTune Modes ***
-  // Set the Left & Right DAC PowerTune mode to PTM_P3/4. Use Class-AB driver.
-  ERROR_CHECK(this->write_byte(AIC3204_PLAY_CFG1, 0x00), "Set PLAY_CFG1 failed");
-  ERROR_CHECK(this->write_byte(AIC3204_PLAY_CFG2, 0x00), "Set PLAY_CFG2 failed");
-  // Set the REF charging time to 40ms
-  ERROR_CHECK(this->write_byte(AIC3204_REF_STARTUP, 0x01), "Set REF_STARTUP failed");
-  // HP soft stepping settings for optimal pop performance at power up
-  // Rpop used is 6k with N = 6 and soft step = 20usec. This should work with 47uF coupling
-  // capacitor. Can try N=5,6 or 7 time constants as well. Trade-off delay vs “pop” sound.
-  ERROR_CHECK(this->write_byte(AIC3204_HP_START, 0x25), "Set HP_START failed");
-  // Route Left DAC to HPL
-  ERROR_CHECK(this->write_byte(AIC3204_HPL_ROUTE, 0x08), "Set HPL_ROUTE failed");
-  // Route Right DAC to HPR
-  ERROR_CHECK(this->write_byte(AIC3204_HPR_ROUTE, 0x08), "Set HPR_ROUTE failed");
-  // Route Left DAC to LOL
-  ERROR_CHECK(this->write_byte(AIC3204_LOL_ROUTE, 0x08), "Set LOL_ROUTE failed");
-  // Route Right DAC to LOR
-  ERROR_CHECK(this->write_byte(AIC3204_LOR_ROUTE, 0x08), "Set LOR_ROUTE failed");
-
-  // Unmute HPL and set gain to -2dB (see comment before configuring the AIC3204_CM_CTRL register)
-  ERROR_CHECK(this->write_byte(AIC3204_HPL_GAIN, 0x3e), "Set HPL_GAIN failed");
-  // Unmute HPR and set gain to -2dB (see comment before configuring the AIC3204_CM_CTRL register)
-  ERROR_CHECK(this->write_byte(AIC3204_HPR_GAIN, 0x3e), "Set HPR_GAIN failed");
-  // Unmute LOL and set gain to 0dB
-  ERROR_CHECK(this->write_byte(AIC3204_LOL_DRV_GAIN, 0x00), "Set LOL_DRV_GAIN failed");
-  // Unmute LOR and set gain to 0dB
-  ERROR_CHECK(this->write_byte(AIC3204_LOR_DRV_GAIN, 0x00), "Set LOR_DRV_GAIN failed");
-
-  // Power up HPL and HPR, LOL and LOR drivers
-  ERROR_CHECK(this->write_byte(AIC3204_OP_PWR_CTRL, 0x3C), "Set OP_PWR_CTRL failed");
+  ERROR_CHECK(this->write_registers(AIC3204_INIT), "Failed to initialize");
 
   // Wait for 2.5 sec for soft stepping to take effect before attempting power-up
   this->set_timeout(2500, [this]() {

esphome/components/as734x/as734x.cpp

@@ -54,7 +54,8 @@ static const char AS7341_NAME[] PROGMEM = "AS7341";
 static constexpr uint8_t AS7341_ADC_SLOTS = 6;
 static constexpr uint8_t AS7341_SMUX_LEN = 20;
 static constexpr uint8_t AS7341_SMUX_STEPS = 2;
-static const RegValue AS7341_INIT[] PROGMEM = {{0x70, 0x00}};  // CONFIG: SPM mode, INT_SEL and LED_SEL cleared
+static constexpr i2c::I2CRegValue AS7341_INIT[] PROGMEM = {
+    {0x70, 0x00}};  // CONFIG: SPM mode, INT_SEL and LED_SEL cleared
 static const uint8_t AS7341_SMUX[] PROGMEM = {
     0x30, 0x01, 0x00, 0x00, 0x00, 0x42, 0x00, 0x00, 0x50, 0x00,  // step 0: F1 to F4, NIR, Clear
     0x00, 0x00, 0x20, 0x04, 0x00, 0x30, 0x01, 0x50, 0x00, 0x06,  // step 0, continued
@@ -150,8 +151,8 @@ static constexpr uint8_t AS7343_ADC_SLOTS = 18;
 static constexpr uint8_t AS7343_SMUX_LEN = 10;
 static const char TCS3448_NAME[] PROGMEM = "TCS3448";
 // CFG6, FD_CFG0, CFG10, CFG8, CFG20 (auto_smux, 18 channels in 3 cycles), AGC_GAIN_MAX, FD_TIME_1, FD_TIME_2
-static const RegValue AS7343_INIT[] PROGMEM = {{0xF5, 0x00}, {0xDF, 0xA1}, {0x65, 0xF2}, {0xC9, 0xC8},
-                                               {0xD6, 0x62}, {0xD7, 0x99}, {0xE0, 0x64}, {0xE2, 0x21}};
+static constexpr i2c::I2CRegValue AS7343_INIT[] PROGMEM = {{0xF5, 0x00}, {0xDF, 0xA1}, {0x65, 0xF2}, {0xC9, 0xC8},
+                                                           {0xD6, 0x62}, {0xD7, 0x99}, {0xE0, 0x64}, {0xE2, 0x21}};
 static const uint8_t AS7343_SMUX[] PROGMEM = {0x00, 0x04, 0x65, 0x02, 0x00, 0x05, 0x00, 0x01, 0x00, 0x30,
                                               0x00, 0x00, 0x60, 0x20, 0x04, 0x50, 0x03, 0x00, 0x01, 0x05,
                                               0x05, 0x00, 0x60, 0x00, 0x30, 0x00, 0x40, 0x10, 0x20, 0x00};
@@ -230,7 +231,7 @@ static constexpr ChipInfo as7343_chip(const char *name) {
       .gain_correction = AS7343_GAIN_CORRECTION,
       .contributions = AS7343_CONTRIBUTIONS,
       .tristimulus = AS7343_TRISTIMULUS,
-      .init_count = sizeof(AS7343_INIT) / sizeof(RegValue),
+      .init_count = sizeof(AS7343_INIT) / sizeof(i2c::I2CRegValue),
       .astep_reg = 0xD4,
       .cfg0_reg = 0xBF,
       .cfg1_reg = 0xC6,
@@ -303,9 +304,9 @@ void AS734XComponent::setup() {
     this->mark_failed(LOG_STR("Wrong chip ID"));
     return;
   }
-  const RegValue *init = pgm(chip->init);
+  const i2c::I2CRegValue *init = pgm(chip->init);
   for (uint8_t i = 0, n = pgm(chip->init_count); ok && i < n; i++) {
-    RegValue rv;
+    i2c::I2CRegValue rv;
     progmem_memcpy(&rv, &init[i], sizeof(rv));
     ok = this->select_bank_(rv.reg) && this->write_byte(rv.reg, rv.value);
   }

esphome/components/as734x/as734x.h

@@ -68,15 +68,10 @@ struct ChannelTristimulus {
   float z;
 };
 
-struct RegValue {
-  uint8_t reg;
-  uint8_t value;
-};
-
 /// Per-chip constants, stored in flash. The pointed-to tables are in flash too.
 struct ChipInfo {
   const char *name;
-  const RegValue *init;                      // written in order; the bank is selected per register address
+  const i2c::I2CRegValue *init;              // written in order; the bank is selected per register address
   const uint8_t *smux;                       // AS7341: SMUX RAM image per step; AS7343: the three chain images
   const uint8_t *readout;                    // per step, the ADC slot of each band (0xFF: not read in this step)
   const uint16_t *wavelengths;               // per band, WIDEBAND_NM for clear and ABSENT_NM for a missing band

esphome/components/es7210/es7210.cpp

@@ -33,53 +33,59 @@ void ES7210::dump_config() {
                 this->channel_gains_[2], this->channel_gains_[3]);
 }
 
+static constexpr i2c::I2CRegValue ES7210_RESET[] PROGMEM = {
+    // Software reset
+    {ES7210_RESET_REG00, 0xff},
+    {ES7210_RESET_REG00, 0x32},
+    {ES7210_CLOCK_OFF_REG01, 0x3f},
+    // Set initialization time when device powers up
+    {ES7210_TIME_CONTROL0_REG09, 0x30},
+    {ES7210_TIME_CONTROL1_REG0A, 0x30},
+    // Configure HFP for all ADC channels
+    {ES7210_ADC12_HPF2_REG23, 0x2a},
+    {ES7210_ADC12_HPF1_REG22, 0x0a},
+    {ES7210_ADC34_HPF2_REG20, 0x0a},
+    {ES7210_ADC34_HPF1_REG21, 0x2a},
+};
+
+static constexpr i2c::I2CRegValue ES7210_ANALOG[] PROGMEM = {
+    // Configure analog power
+    {ES7210_ANALOG_REG40, 0xC3},
+    // Set mic bias
+    {ES7210_MIC12_BIAS_REG41, 0x70},
+    {ES7210_MIC34_BIAS_REG42, 0x70},
+};
+
+static constexpr i2c::I2CRegValue ES7210_POWER_ON[] PROGMEM = {
+    // Power on mics 1 through 4
+    {ES7210_MIC1_POWER_REG47, 0x08},
+    {ES7210_MIC2_POWER_REG48, 0x08},
+    {ES7210_MIC3_POWER_REG49, 0x08},
+    {ES7210_MIC4_POWER_REG4A, 0x08},
+    // Power down DLL
+    {ES7210_POWER_DOWN_REG06, 0x04},
+    // Power on MIC1-4 bias & ADC1-4 & PGA1-4 Power
+    {ES7210_MIC12_POWER_REG4B, 0x0F},
+    {ES7210_MIC34_POWER_REG4C, 0x0F},
+    // Enable device
+    {ES7210_RESET_REG00, 0x71},
+    {ES7210_RESET_REG00, 0x41},
+};
+
 void ES7210::setup() {
-  // Software reset
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_RESET_REG00, 0xff));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_RESET_REG00, 0x32));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_CLOCK_OFF_REG01, 0x3f));
-
-  // Set initialization time when device powers up
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_TIME_CONTROL0_REG09, 0x30));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_TIME_CONTROL1_REG0A, 0x30));
-
-  // Configure HFP for all ADC channels
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_ADC12_HPF2_REG23, 0x2a));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_ADC12_HPF1_REG22, 0x0a));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_ADC34_HPF2_REG20, 0x0a));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_ADC34_HPF1_REG21, 0x2a));
+  ES7210_ERROR_FAILED(this->write_registers(ES7210_RESET));
 
   // Secondary I2S mode settings
   ES7210_ERROR_FAILED(this->es7210_update_reg_bit_(ES7210_MODE_CONFIG_REG08, 0x01, 0x00));
 
-  // Configure analog power
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_ANALOG_REG40, 0xC3));
-
-  // Set mic bias
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_MIC12_BIAS_REG41, 0x70));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_MIC34_BIAS_REG42, 0x70));
+  ES7210_ERROR_FAILED(this->write_registers(ES7210_ANALOG));
 
   // Configure I2S settings, sample rate, and microphone gains
   ES7210_ERROR_FAILED(this->configure_i2s_format_());
   ES7210_ERROR_FAILED(this->configure_sample_rate_());
   ES7210_ERROR_FAILED(this->configure_mic_gain_());
 
-  // Power on mics 1 through 4
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_MIC1_POWER_REG47, 0x08));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_MIC2_POWER_REG48, 0x08));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_MIC3_POWER_REG49, 0x08));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_MIC4_POWER_REG4A, 0x08));
-
-  // Power down DLL
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_POWER_DOWN_REG06, 0x04));
-
-  // Power on MIC1-4 bias & ADC1-4 & PGA1-4 Power
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_MIC12_POWER_REG4B, 0x0F));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_MIC34_POWER_REG4C, 0x0F));
-
-  // Enable device
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_RESET_REG00, 0x71));
-  ES7210_ERROR_FAILED(this->write_byte(ES7210_RESET_REG00, 0x41));
+  ES7210_ERROR_FAILED(this->write_registers(ES7210_POWER_ON));
 
   this->setup_complete_ = true;
 }

esphome/components/es7243e/es7243e.cpp

@@ -25,56 +25,62 @@ ESPHOME_LOG_TAG(TAG, "es7243e");
 
 void ES7243E::dump_config() { ESP_LOGCONFIG(TAG, "ES7243E audio ADC:"); }
 
+// clang-format off
+static constexpr i2c::I2CRegValue ES7243E_INIT[] PROGMEM = {
+    {ES7243E_CLOCK_MGR_REG01, 0x3A},
+    {ES7243E_RESET_REG00, 0x80},
+    {ES7243E_TEST_MODE_REGF9, 0x00},
+    {ES7243E_CLOCK_MGR_REG04, 0x02},
+    {ES7243E_CLOCK_MGR_REG04, 0x01},
+    {ES7243E_TEST_MODE_REGF9, 0x01},
+    {ES7243E_RESET_REG00, 0x1E},
+    {ES7243E_CLOCK_MGR_REG01, 0x00},
+    {ES7243E_CLOCK_MGR_REG02, 0x00},
+    {ES7243E_CLOCK_MGR_REG03, 0x20},
+    {ES7243E_CLOCK_MGR_REG04, 0x01},
+    {ES7243E_ADC_CTRL_REG0D, 0x00},
+    {ES7243E_CLOCK_MGR_REG05, 0x00},
+    {ES7243E_CLOCK_MGR_REG06, 0x03},  // SCLK=MCLK/4
+    {ES7243E_CLOCK_MGR_REG07, 0x00},  // LRCK=MCLK/256
+    {ES7243E_CLOCK_MGR_REG08, 0xFF},  // LRCK=MCLK/256
+    {ES7243E_CLOCK_MGR_REG09, 0xCA},
+    {ES7243E_SDP_REG0A, 0x85},
+    {ES7243E_SDP_REG0B, 0x00},
+    {ES7243E_ADC_CTRL_REG0E, 0xBF},
+    {ES7243E_ADC_CTRL_REG0F, 0x80},
+    {ES7243E_ADC_CTRL_REG14, 0x0C},
+    {ES7243E_ADC_CTRL_REG15, 0x0C},
+    {ES7243E_ANALOG_REG17, 0x02},
+    {ES7243E_ANALOG_REG18, 0x26},
+    {ES7243E_ANALOG_REG19, 0x77},
+    {ES7243E_ANALOG_REG1A, 0xF4},
+    {ES7243E_ANALOG_REG1B, 0x66},
+    {ES7243E_ANALOG_REG1C, 0x44},
+    {ES7243E_ANALOG_REG1E, 0x00},
+    {ES7243E_ANALOG_REG1F, 0x0C},
+    {ES7243E_ANALOG_REG20, 0x1A},  // PGA gain +30dB
+    {ES7243E_ANALOG_REG21, 0x1A},
+    {ES7243E_RESET_REG00, 0x80},
+    {ES7243E_CLOCK_MGR_REG01, 0x3A},
+    {ES7243E_ANALOG_REG16, 0x3F},
+    {ES7243E_ANALOG_REG16, 0x00},
+    {ES7243E_TEST_MODE_REGF9, 0x00},
+    {ES7243E_CLOCK_MGR_REG04, 0x01},
+    {ES7243E_ANALOG_REG17, 0x01},
+};
+// clang-format on
+
+static constexpr i2c::I2CRegValue ES7243E_START[] PROGMEM = {
+    {ES7243E_RESET_REG00, 0x80},
+    {ES7243E_CLOCK_MGR_REG01, 0x3A},
+    {ES7243E_ANALOG_REG16, 0x3F},
+    {ES7243E_ANALOG_REG16, 0x00},
+};
+
 void ES7243E::setup() {
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG01, 0x3A));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_RESET_REG00, 0x80));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_TEST_MODE_REGF9, 0x00));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG04, 0x02));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG04, 0x01));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_TEST_MODE_REGF9, 0x01));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_RESET_REG00, 0x1E));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG01, 0x00));
-
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG02, 0x00));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG03, 0x20));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG04, 0x01));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ADC_CTRL_REG0D, 0x00));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG05, 0x00));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG06, 0x03));  // SCLK=MCLK/4
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG07, 0x00));  // LRCK=MCLK/256
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG08, 0xFF));  // LRCK=MCLK/256
-
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG09, 0xCA));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_SDP_REG0A, 0x85));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_SDP_REG0B, 0x00));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ADC_CTRL_REG0E, 0xBF));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ADC_CTRL_REG0F, 0x80));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ADC_CTRL_REG14, 0x0C));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ADC_CTRL_REG15, 0x0C));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG17, 0x02));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG18, 0x26));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG19, 0x77));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG1A, 0xF4));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG1B, 0x66));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG1C, 0x44));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG1E, 0x00));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG1F, 0x0C));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG20, 0x1A));  // PGA gain +30dB
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG21, 0x1A));
-
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_RESET_REG00, 0x80));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG01, 0x3A));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG16, 0x3F));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG16, 0x00));
-
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_TEST_MODE_REGF9, 0x00));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG04, 0x01));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG17, 0x01));
+  ES7243E_ERROR_FAILED(this->write_registers(ES7243E_INIT));
   ES7243E_ERROR_FAILED(this->configure_mic_gain_());
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_RESET_REG00, 0x80));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_CLOCK_MGR_REG01, 0x3A));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG16, 0x3F));
-  ES7243E_ERROR_FAILED(this->write_byte(ES7243E_ANALOG_REG16, 0x00));
+  ES7243E_ERROR_FAILED(this->write_registers(ES7243E_START));
 
   this->setup_complete_ = true;
 }

esphome/components/es8156/es8156.cpp

@@ -8,70 +8,54 @@ namespace esphome::es8156 {
 
 ESPHOME_LOG_TAG(TAG, "es8156");
 
-// Mark the component as failed; use only in setup
-#define ES8156_ERROR_FAILED(func) \
-  if (!(func)) { \
-    this->mark_failed(LOG_STR("Failed to initialize")); \
-    return; \
-  }
+static constexpr i2c::I2CRegValue ES8156_INIT[] PROGMEM = {
+    // REG02 MODE CONFIG 1: Enable software mode for I2C control of volume/mute
+    // Bit 2: SOFT_MODE_SEL=1 (software mode enabled)
+    {ES8156_REG02_SCLK_MODE, 0x04},
+    // Analog system configuration (active-low power down bits, active-high enables)
+    // REG20 ANALOG SYSTEM: Configure analog signal path
+    {ES8156_REG20_ANALOG_SYS1, 0x2A},
+    // REG21 ANALOG SYSTEM: VSEL=0x1C (bias level ~120%), normal VREF ramp speed
+    {ES8156_REG21_ANALOG_SYS2, 0x3C},
+    // REG22 ANALOG SYSTEM: Line out mode (HPSW=0), OUT_MUTE=0 (not muted)
+    {ES8156_REG22_ANALOG_SYS3, 0x00},
+    // REG24 ANALOG SYSTEM: Low power mode for VREFBUF, HPCOM, DACVRP; DAC normal power
+    // Bits 2:0 = 0x07: LPVREFBUF=1, LPHPCOM=1, LPDACVRP=1, LPDAC=0
+    {ES8156_REG24_ANALOG_LP, 0x07},
+    // REG23 ANALOG SYSTEM: Lowest bias (IBIAS_SW=0), VMIDLVL=VDDA/2, normal impedance
+    {ES8156_REG23_ANALOG_SYS4, 0x00},
+    // Timing and interface configuration
+    // REG0A/0B TIME CONTROL: Fast state machine transitions
+    {ES8156_REG0A_TIME_CONTROL1, 0x01},
+    {ES8156_REG0B_TIME_CONTROL2, 0x01},
+    // REG11 SDP INTERFACE CONFIG: Default I2S format (24-bit, I2S mode)
+    {ES8156_REG11_DAC_SDP, 0x00},
+    // REG19 EQ CONTROL 1: EQ disabled (EQ_ON=0), EQ_BAND_NUM=2
+    {ES8156_REG19_EQ_CONTROL1, 0x20},
+    // REG0D P2S CONTROL: Parallel-to-serial converter settings
+    {ES8156_REG0D_P2S_CONTROL, 0x14},
+    // REG09 MISC CONTROL 2: Default settings
+    {ES8156_REG09_MISC_CONTROL2, 0x00},
+    // REG18 MISC CONTROL 3: Stereo channel routing, no inversion
+    // Bits 5:4 CHN_CROSS: 0=L→L/R→R, 1=L to both, 2=R to both, 3=swap L/R
+    // Bits 3:2: LCH_INV/RCH_INV channel inversion
+    {ES8156_REG18_MISC_CONTROL3, 0x00},
+    // REG08 CLOCK OFF: Enable all internal clocks (0x3F = all clock gates open)
+    {ES8156_REG08_CLOCK_ON_OFF, 0x3F},
+    // REG00 RESET CONTROL: Reset sequence
+    // First: RST_DIG=1 (assert digital reset)
+    {ES8156_REG00_RESET, 0x02},
+    // Then: CSM_ON=1 (enable chip state machine), RST_DIG=1
+    {ES8156_REG00_RESET, 0x03},
+    // REG25 ANALOG SYSTEM: Power up analog blocks
+    // VMIDSEL=2 (normal VMID operation), PDN_ANA=0, ENREFR=0, ENHPCOM=0
+    // PDN_DACVREFGEN=0, PDN_VREFBUF=0, PDN_DAC=0 (all enabled)
+    {ES8156_REG25_ANALOG_SYS5, 0x20},
+};
 
 void ES8156::setup() {
-  // REG02 MODE CONFIG 1: Enable software mode for I2C control of volume/mute
-  // Bit 2: SOFT_MODE_SEL=1 (software mode enabled)
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG02_SCLK_MODE, 0x04));
-
-  // Analog system configuration (active-low power down bits, active-high enables)
-  // REG20 ANALOG SYSTEM: Configure analog signal path
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG20_ANALOG_SYS1, 0x2A));
-
-  // REG21 ANALOG SYSTEM: VSEL=0x1C (bias level ~120%), normal VREF ramp speed
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG21_ANALOG_SYS2, 0x3C));
-
-  // REG22 ANALOG SYSTEM: Line out mode (HPSW=0), OUT_MUTE=0 (not muted)
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG22_ANALOG_SYS3, 0x00));
-
-  // REG24 ANALOG SYSTEM: Low power mode for VREFBUF, HPCOM, DACVRP; DAC normal power
-  // Bits 2:0 = 0x07: LPVREFBUF=1, LPHPCOM=1, LPDACVRP=1, LPDAC=0
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG24_ANALOG_LP, 0x07));
-
-  // REG23 ANALOG SYSTEM: Lowest bias (IBIAS_SW=0), VMIDLVL=VDDA/2, normal impedance
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG23_ANALOG_SYS4, 0x00));
-
-  // Timing and interface configuration
-  // REG0A/0B TIME CONTROL: Fast state machine transitions
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG0A_TIME_CONTROL1, 0x01));
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG0B_TIME_CONTROL2, 0x01));
-
-  // REG11 SDP INTERFACE CONFIG: Default I2S format (24-bit, I2S mode)
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG11_DAC_SDP, 0x00));
-
-  // REG19 EQ CONTROL 1: EQ disabled (EQ_ON=0), EQ_BAND_NUM=2
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG19_EQ_CONTROL1, 0x20));
-
-  // REG0D P2S CONTROL: Parallel-to-serial converter settings
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG0D_P2S_CONTROL, 0x14));
-
-  // REG09 MISC CONTROL 2: Default settings
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG09_MISC_CONTROL2, 0x00));
-
-  // REG18 MISC CONTROL 3: Stereo channel routing, no inversion
-  // Bits 5:4 CHN_CROSS: 0=L→L/R→R, 1=L to both, 2=R to both, 3=swap L/R
-  // Bits 3:2: LCH_INV/RCH_INV channel inversion
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG18_MISC_CONTROL3, 0x00));
-
-  // REG08 CLOCK OFF: Enable all internal clocks (0x3F = all clock gates open)
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG08_CLOCK_ON_OFF, 0x3F));
-
-  // REG00 RESET CONTROL: Reset sequence
-  // First: RST_DIG=1 (assert digital reset)
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG00_RESET, 0x02));
-  // Then: CSM_ON=1 (enable chip state machine), RST_DIG=1
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG00_RESET, 0x03));
-
-  // REG25 ANALOG SYSTEM: Power up analog blocks
-  // VMIDSEL=2 (normal VMID operation), PDN_ANA=0, ENREFR=0, ENHPCOM=0
-  // PDN_DACVREFGEN=0, PDN_VREFBUF=0, PDN_DAC=0 (all enabled)
-  ES8156_ERROR_FAILED(this->write_byte(ES8156_REG25_ANALOG_SYS5, 0x20));
+  if (!this->write_registers(ES8156_INIT))
+    this->mark_failed(LOG_STR("Failed to initialize"));
 }
 
 void ES8156::dump_config() { ESP_LOGCONFIG(TAG, "ES8156 Audio Codec:"); }

esphome/components/es8388/es8388.cpp

@@ -21,79 +21,76 @@ ESPHOME_LOG_TAG(TAG, "es8388");
     return false; \
   }
 
+static constexpr i2c::I2CRegValue ES8388_INIT[] PROGMEM = {
+    // I2S worker mode
+    {ES8388_MASTERMODE, 0x00},
+    /* Chip Control and Power Management */
+    {ES8388_CONTROL2, 0x50},
+    // normal all and power up all
+    {ES8388_CHIPPOWER, 0x00},
+    // vmidsel/500k
+    // EnRef=0,Play&Record Mode,(0x17-both of mic&play)
+    {ES8388_CONTROL1, 0x12},
+    // i2s 16 bits
+    {ES8388_DACCONTROL1, 0x18},
+    // sample freq 256
+    // DACFsMode,SINGLE SPEED; DACFsRatio,256
+    {ES8388_DACCONTROL2, 0x02},
+    // 0x00 audio on LIN1&RIN1,  0x09 LIN2&RIN2
+    {ES8388_DACCONTROL16, 0x00},
+    // only left DAC to left mixer enable 0db
+    {ES8388_DACCONTROL17, 0x90},
+    // only right DAC to right mixer enable 0db
+    {ES8388_DACCONTROL20, 0x90},
+    // set internal ADC and DAC use the same LRCK clock, ADC LRCK as internal LRCK
+    {ES8388_DACCONTROL21, 0x80},
+    // vroi=0 - 1.5k VREF to analog output resistance (default)
+    {ES8388_DACCONTROL23, 0x00},
+    // power down adc and line in
+    {ES8388_ADCPOWER, 0xFF},
+    //@nightdav
+    {ES8388_ADCCONTROL1, 0x00},  // +21dB : recommended value for ALC & voice recording
+    // set to Mono Right
+    {ES8388_ADCCONTROL3, 0x02},
+    // I2S 16 Bits length and I2S serial audio data format
+    {ES8388_ADCCONTROL4, 0x0d},
+    // ADCFsMode,singel SPEED,RATIO=256
+    {ES8388_ADCCONTROL5, 0x02},
+    // ADC Volume
+    {ES8388_ADCCONTROL8, 0x00},
+    {ES8388_ADCCONTROL9, 0x00},
+    //@nightDav
+    // ALC Config (as recommended by ES8388 user guide for voice recording)
+    // Reg 0x12 = 0xe2 (ALC enable, PGA Max. Gain=23.5dB, Min. Gain=0dB)
+    {ES8388_ADCCONTROL10, 0xe2},
+    // Reg 0x13 = 0xa0 (ALC Target=-1.5dB, ALC Hold time =0 mS)
+    {ES8388_ADCCONTROL11, 0xa0},
+    // Reg 0x14 = 0x12(Decay time =820uS , Attack time = 416 uS)
+    {ES8388_ADCCONTROL12, 0x12},
+    // Reg 0x15 = 0x06(ALC mode)
+    {ES8388_ADCCONTROL13, 0x06},
+    // Reg 0x16 = 0xc3(nose gate = -40.5dB, NGG = 0x01(mute ADC))
+    {ES8388_ADCCONTROL14, 0xc3},
+    // Power on ADC
+    {ES8388_DACCONTROL21, 0x80},
+    // Start state machine
+    {ES8388_CHIPPOWER, 0xF0},
+};
+
+static constexpr i2c::I2CRegValue ES8388_UNMUTE[] PROGMEM = {
+    // unmute ADC with fade in
+    {ES8388_ADCCONTROL7, 0x60},
+    // unmute DAC with fade in
+    {ES8388_DACCONTROL3, 0x20},
+    // Power on ADC, Enable LIN&RIN, Power off MICBIAS, set int1lp to low power mode
+    {ES8388_ADCPOWER, 0x09},
+};
+
 void ES8388::setup() {
   // mute DAC
   this->set_mute_state_(true);
 
-  // I2S worker mode
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_MASTERMODE, 0x00));
-
-  /* Chip Control and Power Management */
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_CONTROL2, 0x50));
-  // normal all and power up all
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_CHIPPOWER, 0x00));
-
-  // vmidsel/500k
-  // EnRef=0,Play&Record Mode,(0x17-both of mic&play)
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_CONTROL1, 0x12));
-
-  // i2s 16 bits
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_DACCONTROL1, 0x18));
-  // sample freq 256
-  // DACFsMode,SINGLE SPEED; DACFsRatio,256
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_DACCONTROL2, 0x02));
-  // 0x00 audio on LIN1&RIN1,  0x09 LIN2&RIN2
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_DACCONTROL16, 0x00));
-  // only left DAC to left mixer enable 0db
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_DACCONTROL17, 0x90));
-  // only right DAC to right mixer enable 0db
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_DACCONTROL20, 0x90));
-  // set internal ADC and DAC use the same LRCK clock, ADC LRCK as internal LRCK
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_DACCONTROL21, 0x80));
-  // vroi=0 - 1.5k VREF to analog output resistance (default)
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_DACCONTROL23, 0x00));
-
-  // power down adc and line in
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCPOWER, 0xFF));
-
-  //@nightdav
-  ES8388_ERROR_FAILED(
-      this->write_byte(ES8388_ADCCONTROL1, 0x00));  // +21dB : recommended value for ALC & voice recording
-
-  // set to Mono Right
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL3, 0x02));
-
-  // I2S 16 Bits length and I2S serial audio data format
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL4, 0x0d));
-  // ADCFsMode,singel SPEED,RATIO=256
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL5, 0x02));
-
-  // ADC Volume
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL8, 0x00));
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL9, 0x00));
-
-  //@nightDav
-  // ALC Config (as recommended by ES8388 user guide for voice recording)
-
-  // Reg 0x12 = 0xe2 (ALC enable, PGA Max. Gain=23.5dB, Min. Gain=0dB)
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL10, 0xe2));
-
-  // Reg 0x13 = 0xa0 (ALC Target=-1.5dB, ALC Hold time =0 mS)
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL11, 0xa0));
-  // Reg 0x14 = 0x12(Decay time =820uS , Attack time = 416 uS)
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL12, 0x12));
-
-  // Reg 0x15 = 0x06(ALC mode)
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL13, 0x06));
-
-  // Reg 0x16 = 0xc3(nose gate = -40.5dB, NGG = 0x01(mute ADC))
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL14, 0xc3));
-
-  // Power on ADC
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_DACCONTROL21, 0x80));
-
-  // Start state machine
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_CHIPPOWER, 0xF0));
+  ES8388_ERROR_FAILED(this->write_registers(ES8388_INIT));
   delay(1);
   ES8388_ERROR_FAILED(this->write_byte(ES8388_CHIPPOWER, 0x00));
 
@@ -103,13 +100,7 @@ void ES8388::setup() {
 
   this->set_mute_state_(false);
 
-  // unmute ADC with fade in
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCCONTROL7, 0x60));
-  // unmute DAC with fade in
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_DACCONTROL3, 0x20));
-
-  // Power on ADC, Enable LIN&RIN, Power off MICBIAS, set int1lp to low power mode
-  ES8388_ERROR_FAILED(this->write_byte(ES8388_ADCPOWER, 0x09));
+  ES8388_ERROR_FAILED(this->write_registers(ES8388_UNMUTE));
 
 #ifdef USE_ES8388_SELECT
   if (this->dac_output_select_ != nullptr) {