CodSpeed's CMake uses CODSPEED_ANALYSIS (not CODSPEED_SIMULATION) for
simulation mode. This define gates all the actual benchmark measurement
hooks in benchmark_runner.cpp and benchmark.h. Without it, benchmarks
run normally but CodSpeed doesn't detect them as instrumented.
benchmark.h uses #ifdef CODSPEED_ENABLED to switch benchmark
registration to CodSpeed-instrumented variants. This define was
only in library.json (applied to library compilation) but not to
the benchmark .cpp files that #include <benchmark/benchmark.h>.
Without it, CodSpeed reports "No benchmarks found".
- Move BASE_CODEGEN_COMPONENTS and USE_TIME_TIMEZONE_FLAG to test_helpers.py
- Use shared constants in both cpp_unit_test.py and cpp_benchmark.py
- Move json import to top level in cpp_benchmark.py
- Refactor setup_codspeed_lib.py into focused helper functions
- Combine clone + submodule init, use --shallow-submodules
- Use CodSpeed's codspeed-cpp fork with proper instrumentation for
simulation mode benchmark detection
- setup_codspeed_lib.py creates a flat PlatformIO-compatible library
by combining google_benchmark sources, codspeed core, and
instrument-hooks into a single library directory
- Renames .cc to .cpp (PlatformIO doesn't compile .cc by default)
- Adds all required defines: CODSPEED_ENABLED, CODSPEED_SIMULATION,
CODSPEED_VERSION, CODSPEED_ROOT_DIR, CODSPEED_MODE_DISPLAY
- Output JSON config consumed by cpp_benchmark.py via env var
- Clone CodSpeed's codspeed-cpp repo (pinned to SHA) in CI
- Create PlatformIO-compatible library.json combining google_benchmark
and codspeed core sources for proper instrumentation
- Pass library path via BENCHMARK_LIB env var to cpp_benchmark.py
- Use simulation mode for reproducible CPU instruction counting
- Locally, vanilla google/benchmark is used (no CodSpeed instrumentation)
Core is not a component — its benchmarks belong in tests/benchmarks/core/
not tests/benchmarks/components/core/. Add extra_include_dirs parameter
to build_and_run to support non-component benchmark directories.
- Move scheduler/loop/helpers benchmarks to tests/benchmarks/components/core/
- Add random_float and random_uint32 benchmarks (from ol.yaml)
- Fix core pseudo-component crash: skip components where get_component()
returns None when adding dependencies to config
- Use CodSpeed simulation mode (CPU instruction counting) for reproducible
CI results instead of walltime
- Add should_run_benchmarks() to determine-jobs.py that checks if
directly changed components have benchmark files (no dependency
expansion - changing sensor won't trigger api benchmarks)
- Move benchmark job from separate workflow into ci.yml
- Pin CodSpeed action to full commit SHA
- Delete separate ci-benchmarks.yml
Add automated benchmarks using Google Benchmark to prevent performance
regressions in the API protobuf encoding/decoding and core loop paths.
Benchmarks cover:
- Protobuf encode: SensorState, BinarySensorState, HelloResponse,
LightState, DeviceInfoResponse (20 nested devices + 20 areas)
- Protobuf decode: HelloRequest, SwitchCommand, LightCommand
- Protobuf calculate_size and full calc+encode send path
- Varint parse/encode/size for various value ranges
- Scheduler call/next_schedule_in with idle and active timers
- Application loop component dispatch and blocking guard overhead
Infrastructure:
- Extract shared build logic from cpp_unit_test.py into test_helpers.py
- Add cpp_benchmark.py mirroring the unit test build pattern
- Support benchmark.yaml per component dir for declaring dependencies
- Add CodSpeed CI workflow triggered on api/core changes
- Fix ProtoMessage protected destructor on host platform
Replace fnv1_hash(str1 + str2) with fnv1_hash_extend(fnv1_hash(str1), str2)
to avoid constructing temporary std::string objects just to compute a hash.
This eliminates the only callers of operator+(const char*, StringRef),
allowing the linker to drop 197 bytes of string concatenation code.
Move ESP32BLE::is_active() and BLEServer::is_running() to headers
with ESPHOME_ALWAYS_INLINE to eliminate cross-TU call overhead on
every loop iteration. Replace std::remove_if + erase in
BLEServer::loop() with a simple index-based compacting loop,
removing ~250 bytes of unrolled STL template machinery.
Move ESP32BLE::is_active() and BLEServer::is_running() to headers
with ESPHOME_ALWAYS_INLINE to eliminate cross-TU call overhead on
every loop iteration. Replace std::remove_if + erase in
BLEServer::loop() with a simple index-based compacting loop,
removing ~250 bytes of unrolled STL template machinery.
Add a new `sram1_as_iram` option under `esp32 > framework > advanced`
that enables CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM, reclaiming
40KB of SRAM1 memory as additional IRAM on the original ESP32.
This requires a bootloader from ESP-IDF v5.1 or later. USB flashing
updates the bootloader automatically, but OTA does not. At boot,
ESPHome now detects the bootloader version and suggests enabling
this option when the bootloader is compatible.
Add a new `sram1_as_iram` option under `esp32 > framework > advanced`
that enables CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM, reclaiming
40KB of SRAM1 memory as additional IRAM on the original ESP32.
This requires a bootloader from ESP-IDF v5.1 or later. USB flashing
updates the bootloader automatically, but OTA does not. At boot,
ESPHome now detects the bootloader version and suggests enabling
this option when the bootloader is compatible.
Add a new `sram1_as_iram` option under `esp32 > framework > advanced`
that enables CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM, reclaiming
40KB of SRAM1 memory as additional IRAM on the original ESP32.
This requires a bootloader from ESP-IDF v5.1 or later. USB flashing
updates the bootloader automatically, but OTA does not. At boot,
ESPHome now detects the bootloader version and suggests enabling
this option when the bootloader is compatible.
Add a new `sram1_as_iram` option under `esp32 > framework > advanced`
that enables CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM, reclaiming
40KB of SRAM1 memory as additional IRAM on the original ESP32.
This requires a bootloader from ESP-IDF v5.1 or later. USB flashing
updates the bootloader automatically, but OTA does not. At boot,
ESPHome now detects the bootloader version and suggests enabling
this option when the bootloader is compatible.
Add a new `sram1_as_iram` option under `esp32 > framework > advanced`
that enables CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM, reclaiming
40KB of SRAM1 memory as additional IRAM on the original ESP32.
This requires a bootloader from ESP-IDF v5.1 or later. USB flashing
updates the bootloader automatically, but OTA does not. At boot,
ESPHome now detects the bootloader version and suggests enabling
this option when the bootloader is compatible.
- Save errno into local before check_socket_write_err_ and HELPER_LOG
to avoid potential clobbering between reads
- Update try_drain() doc: 0 means all-drained or no-progress (callers
only act on -1)
- Include socket/headers.h explicitly for struct iovec
- Move HELPER_LOG after errno check so transient WOULD_BLOCK doesn't
spam very-verbose logs during normal backpressure
- Fix try_drain() docstring: -1 can be EWOULDBLOCK or hard error
(caller distinguishes via errno), 0 means no progress (not would-block)
J. Nick Koston