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[shelly_dimmer] Keep the STM32 device table in flash

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This commit is contained in:
J. Nick Koston
2026-10-13 10:03:57 -10:00
parent 918b7d2553
commit 9d3b3b650e
4 changed files with 131 additions and 113 deletions
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esphome/components/shelly_dimmer/dev_table.h
+99 -89
View File
@@ -21,6 +21,7 @@
#include "esphome/core/defines.h"
#ifdef USE_SHD_FIRMWARE_DATA
#include "esphome/core/hal.h"
#include "stm32flash.h"
namespace esphome::shelly_dimmer {
@@ -41,115 +42,124 @@ constexpr uint32_t SZ_256K = 0x00040000;
*/
/* fixed size pages */
constexpr uint32_t p_128[] = {SZ_128, 0}; // NOLINT
constexpr uint32_t p_256[] = {SZ_256, 0}; // NOLINT
constexpr uint32_t p_1k[] = {SZ_1K, 0}; // NOLINT
constexpr uint32_t p_2k[] = {SZ_2K, 0}; // NOLINT
constexpr uint32_t p_128[] PROGMEM = {SZ_128, 0}; // NOLINT
constexpr uint32_t p_256[] PROGMEM = {SZ_256, 0}; // NOLINT
constexpr uint32_t p_1k[] PROGMEM = {SZ_1K, 0}; // NOLINT
constexpr uint32_t p_2k[] PROGMEM = {SZ_2K, 0}; // NOLINT
/* F2 and F4 page size */
constexpr uint32_t f2f4[] = {SZ_16K, SZ_16K, SZ_16K, SZ_16K, SZ_64K, SZ_128K, 0}; // NOLINT
constexpr uint32_t f2f4[] PROGMEM = {SZ_16K, SZ_16K, SZ_16K, SZ_16K, SZ_64K, SZ_128K, 0}; // NOLINT
/* F4 dual bank page size */
constexpr uint32_t f4db[] = {SZ_16K, SZ_16K, SZ_16K, SZ_16K, SZ_64K, SZ_128K, SZ_128K, // NOLINT
SZ_128K, SZ_16K, SZ_16K, SZ_16K, SZ_16K, SZ_64K, SZ_128K, 0};
constexpr uint32_t f4db[] PROGMEM = {SZ_16K, SZ_16K, SZ_16K, SZ_16K, SZ_64K, SZ_128K, SZ_128K, // NOLINT
SZ_128K, SZ_16K, SZ_16K, SZ_16K, SZ_16K, SZ_64K, SZ_128K, 0};
/* F7 page size */
constexpr uint32_t f7[] = {SZ_32K, SZ_32K, SZ_32K, SZ_32K, SZ_128K, SZ_256K, 0}; // NOLINT
constexpr uint32_t f7[] PROGMEM = {SZ_32K, SZ_32K, SZ_32K, SZ_32K, SZ_128K, SZ_256K, 0}; // NOLINT
/*
* Device table, corresponds to the "Bootloader device-dependant parameters"
* table in ST document AN2606.
* Note that the option bytes upper range is inclusive!
*/
constexpr stm32_dev_t DEVICES[] = {
/* ID "name" SRAM-address-range FLASH-address-range PPS PSize
constexpr stm32_dev_t DEVICES[] PROGMEM = {
/* ID SRAM-address-range FLASH-address-range PPS PSize
Option-byte-addr-range System-mem-addr-range Flags */
/* F0 */
{0x440, "STM32F030x8/F05xxx", 0x20000800, 0x20002000, 0x08000000, 0x08010000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFEC00, 0x1FFFF800, 0},
{0x442, "STM32F030xC/F09xxx", 0x20001800, 0x20008000, 0x08000000, 0x08040000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFC800, 0x1FFFF800, F_OBLL},
{0x444, "STM32F03xx4/6", 0x20000800, 0x20001000, 0x08000000, 0x08008000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFEC00, 0x1FFFF800, 0},
{0x445, "STM32F04xxx/F070x6", 0x20001800, 0x20001800, 0x08000000, 0x08008000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFC400, 0x1FFFF800, 0},
{0x448, "STM32F070xB/F071xx/F72xx", 0x20001800, 0x20004000, 0x08000000, 0x08020000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFC800, 0x1FFFF800, 0},
// STM32F030x8/F05xxx
{0x440, 0x20000800, 0x20002000, 0x08000000, 0x08010000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFEC00, 0x1FFFF800, 0},
// STM32F030xC/F09xxx
{0x442, 0x20001800, 0x20008000, 0x08000000, 0x08040000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC800, 0x1FFFF800,
F_OBLL},
// STM32F03xx4/6
{0x444, 0x20000800, 0x20001000, 0x08000000, 0x08008000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFEC00, 0x1FFFF800, 0},
// STM32F04xxx/F070x6
{0x445, 0x20001800, 0x20001800, 0x08000000, 0x08008000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC400, 0x1FFFF800, 0},
// STM32F070xB/F071xx/F72xx
{0x448, 0x20001800, 0x20004000, 0x08000000, 0x08020000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC800, 0x1FFFF800, 0},
/* F1 */
{0x412, "STM32F10xxx Low-density", 0x20000200, 0x20002800, 0x08000000, 0x08008000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFF000, 0x1FFFF800, 0},
{0x410, "STM32F10xxx Medium-density", 0x20000200, 0x20005000, 0x08000000, 0x08020000, 4, p_1k, 0x1FFFF800,
0x1FFFF80F, 0x1FFFF000, 0x1FFFF800, 0},
{0x414, "STM32F10xxx High-density", 0x20000200, 0x20010000, 0x08000000, 0x08080000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFF000, 0x1FFFF800, 0},
{0x420, "STM32F10xxx Medium-density VL", 0x20000200, 0x20002000, 0x08000000, 0x08020000, 4, p_1k, 0x1FFFF800,
0x1FFFF80F, 0x1FFFF000, 0x1FFFF800, 0},
{0x428, "STM32F10xxx High-density VL", 0x20000200, 0x20008000, 0x08000000, 0x08080000, 2, p_2k, 0x1FFFF800,
0x1FFFF80F, 0x1FFFF000, 0x1FFFF800, 0},
{0x418, "STM32F105xx/F107xx", 0x20001000, 0x20010000, 0x08000000, 0x08040000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFB000, 0x1FFFF800, 0},
{0x430, "STM32F10xxx XL-density", 0x20000800, 0x20018000, 0x08000000, 0x08100000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFE000, 0x1FFFF800, 0},
// STM32F10xxx Low-density
{0x412, 0x20000200, 0x20002800, 0x08000000, 0x08008000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800, 0},
// STM32F10xxx Medium-density
{0x410, 0x20000200, 0x20005000, 0x08000000, 0x08020000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800, 0},
// STM32F10xxx High-density
{0x414, 0x20000200, 0x20010000, 0x08000000, 0x08080000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800, 0},
// STM32F10xxx Medium-density VL
{0x420, 0x20000200, 0x20002000, 0x08000000, 0x08020000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800, 0},
// STM32F10xxx High-density VL
{0x428, 0x20000200, 0x20008000, 0x08000000, 0x08080000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800, 0},
// STM32F105xx/F107xx
{0x418, 0x20001000, 0x20010000, 0x08000000, 0x08040000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFB000, 0x1FFFF800, 0},
// STM32F10xxx XL-density
{0x430, 0x20000800, 0x20018000, 0x08000000, 0x08100000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFE000, 0x1FFFF800, 0},
/* F2 */
{0x411, "STM32F2xxxx", 0x20002000, 0x20020000, 0x08000000, 0x08100000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000,
0x1FFF7800, 0},
// STM32F2xxxx
{0x411, 0x20002000, 0x20020000, 0x08000000, 0x08100000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF7800, 0},
/* F3 */
{0x432, "STM32F373xx/F378xx", 0x20001400, 0x20008000, 0x08000000, 0x08040000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFD800, 0x1FFFF800, 0},
{0x422, "STM32F302xB(C)/F303xB(C)/F358xx", 0x20001400, 0x2000A000, 0x08000000, 0x08040000, 2, p_2k, 0x1FFFF800,
0x1FFFF80F, 0x1FFFD800, 0x1FFFF800, 0},
{0x439, "STM32F301xx/F302x4(6/8)/F318xx", 0x20001800, 0x20004000, 0x08000000, 0x08010000, 2, p_2k, 0x1FFFF800,
0x1FFFF80F, 0x1FFFD800, 0x1FFFF800, 0},
{0x438, "STM32F303x4(6/8)/F334xx/F328xx", 0x20001800, 0x20003000, 0x08000000, 0x08010000, 2, p_2k, 0x1FFFF800,
0x1FFFF80F, 0x1FFFD800, 0x1FFFF800, 0},
{0x446, "STM32F302xD(E)/F303xD(E)/F398xx", 0x20001800, 0x20010000, 0x08000000, 0x08080000, 2, p_2k, 0x1FFFF800,
0x1FFFF80F, 0x1FFFD800, 0x1FFFF800, 0},
// STM32F373xx/F378xx
{0x432, 0x20001400, 0x20008000, 0x08000000, 0x08040000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800, 0},
// STM32F302xB(C)/F303xB(C)/F358xx
{0x422, 0x20001400, 0x2000A000, 0x08000000, 0x08040000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800, 0},
// STM32F301xx/F302x4(6/8)/F318xx
{0x439, 0x20001800, 0x20004000, 0x08000000, 0x08010000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800, 0},
// STM32F303x4(6/8)/F334xx/F328xx
{0x438, 0x20001800, 0x20003000, 0x08000000, 0x08010000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800, 0},
// STM32F302xD(E)/F303xD(E)/F398xx
{0x446, 0x20001800, 0x20010000, 0x08000000, 0x08080000, 2, p_2k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800, 0},
/* F4 */
{0x413, "STM32F40xxx/41xxx", 0x20003000, 0x20020000, 0x08000000, 0x08100000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F,
0x1FFF0000, 0x1FFF7800, 0},
{0x419, "STM32F42xxx/43xxx", 0x20003000, 0x20030000, 0x08000000, 0x08200000, 1, f4db, 0x1FFEC000, 0x1FFFC00F,
0x1FFF0000, 0x1FFF7800, 0},
{0x423, "STM32F401xB(C)", 0x20003000, 0x20010000, 0x08000000, 0x08040000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F,
0x1FFF0000, 0x1FFF7800, 0},
{0x433, "STM32F401xD(E)", 0x20003000, 0x20018000, 0x08000000, 0x08080000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F,
0x1FFF0000, 0x1FFF7800, 0},
{0x458, "STM32F410xx", 0x20003000, 0x20008000, 0x08000000, 0x08020000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000,
0x1FFF7800, 0},
{0x431, "STM32F411xx", 0x20003000, 0x20020000, 0x08000000, 0x08080000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000,
0x1FFF7800, 0},
{0x421, "STM32F446xx", 0x20003000, 0x20020000, 0x08000000, 0x08080000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000,
0x1FFF7800, 0},
{0x434, "STM32F469xx", 0x20003000, 0x20060000, 0x08000000, 0x08200000, 1, f4db, 0x1FFEC000, 0x1FFFC00F, 0x1FFF0000,
0x1FFF7800, 0},
// STM32F40xxx/41xxx
{0x413, 0x20003000, 0x20020000, 0x08000000, 0x08100000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF7800, 0},
// STM32F42xxx/43xxx
{0x419, 0x20003000, 0x20030000, 0x08000000, 0x08200000, 1, f4db, 0x1FFEC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF7800, 0},
// STM32F401xB(C)
{0x423, 0x20003000, 0x20010000, 0x08000000, 0x08040000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF7800, 0},
// STM32F401xD(E)
{0x433, 0x20003000, 0x20018000, 0x08000000, 0x08080000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF7800, 0},
// STM32F410xx
{0x458, 0x20003000, 0x20008000, 0x08000000, 0x08020000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF7800, 0},
// STM32F411xx
{0x431, 0x20003000, 0x20020000, 0x08000000, 0x08080000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF7800, 0},
// STM32F446xx
{0x421, 0x20003000, 0x20020000, 0x08000000, 0x08080000, 1, f2f4, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF7800, 0},
// STM32F469xx
{0x434, 0x20003000, 0x20060000, 0x08000000, 0x08200000, 1, f4db, 0x1FFEC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF7800, 0},
/* F7 */
{0x449, "STM32F74xxx/75xxx", 0x20004000, 0x20050000, 0x08000000, 0x08100000, 1, f7, 0x1FFF0000, 0x1FFF001F,
0x1FF00000, 0x1FF0EDC0, 0},
// STM32F74xxx/75xxx
{0x449, 0x20004000, 0x20050000, 0x08000000, 0x08100000, 1, f7, 0x1FFF0000, 0x1FFF001F, 0x1FF00000, 0x1FF0EDC0, 0},
/* L0 */
{0x425, "STM32L031xx/041xx", 0x20001000, 0x20002000, 0x08000000, 0x08008000, 32, p_128, 0x1FF80000, 0x1FF8001F,
0x1FF00000, 0x1FF01000, 0},
{0x417, "STM32L05xxx/06xxx", 0x20001000, 0x20002000, 0x08000000, 0x08010000, 32, p_128, 0x1FF80000, 0x1FF8001F,
0x1FF00000, 0x1FF01000, 0},
{0x447, "STM32L07xxx/08xxx", 0x20002000, 0x20005000, 0x08000000, 0x08030000, 32, p_128, 0x1FF80000, 0x1FF8001F,
0x1FF00000, 0x1FF02000, 0},
// STM32L031xx/041xx
{0x425, 0x20001000, 0x20002000, 0x08000000, 0x08008000, 32, p_128, 0x1FF80000, 0x1FF8001F, 0x1FF00000, 0x1FF01000,
0},
// STM32L05xxx/06xxx
{0x417, 0x20001000, 0x20002000, 0x08000000, 0x08010000, 32, p_128, 0x1FF80000, 0x1FF8001F, 0x1FF00000, 0x1FF01000,
0},
// STM32L07xxx/08xxx
{0x447, 0x20002000, 0x20005000, 0x08000000, 0x08030000, 32, p_128, 0x1FF80000, 0x1FF8001F, 0x1FF00000, 0x1FF02000,
0},
/* L1 */
{0x416, "STM32L1xxx6(8/B)", 0x20000800, 0x20004000, 0x08000000, 0x08020000, 16, p_256, 0x1FF80000, 0x1FF8001F,
0x1FF00000, 0x1FF01000, F_NO_ME},
{0x429, "STM32L1xxx6(8/B)A", 0x20001000, 0x20008000, 0x08000000, 0x08020000, 16, p_256, 0x1FF80000, 0x1FF8001F,
0x1FF00000, 0x1FF01000, 0},
{0x427, "STM32L1xxxC", 0x20001000, 0x20008000, 0x08000000, 0x08040000, 16, p_256, 0x1FF80000, 0x1FF8001F,
0x1FF00000, 0x1FF02000, 0},
{0x436, "STM32L1xxxD", 0x20001000, 0x2000C000, 0x08000000, 0x08060000, 16, p_256, 0x1FF80000, 0x1FF8009F,
0x1FF00000, 0x1FF02000, 0},
{0x437, "STM32L1xxxE", 0x20001000, 0x20014000, 0x08000000, 0x08080000, 16, p_256, 0x1FF80000, 0x1FF8009F,
0x1FF00000, 0x1FF02000, F_NO_ME},
// STM32L1xxx6(8/B)
{0x416, 0x20000800, 0x20004000, 0x08000000, 0x08020000, 16, p_256, 0x1FF80000, 0x1FF8001F, 0x1FF00000, 0x1FF01000,
F_NO_ME},
// STM32L1xxx6(8/B)A
{0x429, 0x20001000, 0x20008000, 0x08000000, 0x08020000, 16, p_256, 0x1FF80000, 0x1FF8001F, 0x1FF00000, 0x1FF01000,
0},
// STM32L1xxxC
{0x427, 0x20001000, 0x20008000, 0x08000000, 0x08040000, 16, p_256, 0x1FF80000, 0x1FF8001F, 0x1FF00000, 0x1FF02000,
0},
// STM32L1xxxD
{0x436, 0x20001000, 0x2000C000, 0x08000000, 0x08060000, 16, p_256, 0x1FF80000, 0x1FF8009F, 0x1FF00000, 0x1FF02000,
0},
// STM32L1xxxE
{0x437, 0x20001000, 0x20014000, 0x08000000, 0x08080000, 16, p_256, 0x1FF80000, 0x1FF8009F, 0x1FF00000, 0x1FF02000,
F_NO_ME},
/* L4 */
{0x415, "STM32L476xx/486xx", 0x20003100, 0x20018000, 0x08000000, 0x08100000, 1, p_2k, 0x1FFF7800, 0x1FFFF80F,
0x1FFF0000, 0x1FFF7000, 0},
// STM32L476xx/486xx
{0x415, 0x20003100, 0x20018000, 0x08000000, 0x08100000, 1, p_2k, 0x1FFF7800, 0x1FFFF80F, 0x1FFF0000, 0x1FFF7000, 0},
/* These are not (yet) in AN2606: */
{0x641, "Medium_Density PL", 0x20000200, 0x20005000, 0x08000000, 0x08020000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F,
0x1FFFF000, 0x1FFFF800, 0},
{0x9a8, "STM32W-128K", 0x20000200, 0x20002000, 0x08000000, 0x08020000, 4, p_1k, 0x08040800, 0x0804080F, 0x08040000,
0x08040800, 0},
{0x9b0, "STM32W-256K", 0x20000200, 0x20004000, 0x08000000, 0x08040000, 4, p_2k, 0x08040800, 0x0804080F, 0x08040000,
0x08040800, 0},
{0x0, "", 0x0, 0x0, 0x0, 0x0, 0x0, nullptr, 0x0, 0x0, 0x0, 0x0, 0x0},
// Medium_Density PL
{0x641, 0x20000200, 0x20005000, 0x08000000, 0x08020000, 4, p_1k, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800, 0},
// STM32W-128K
{0x9a8, 0x20000200, 0x20002000, 0x08000000, 0x08020000, 4, p_1k, 0x08040800, 0x0804080F, 0x08040000, 0x08040800, 0},
// STM32W-256K
{0x9b0, 0x20000200, 0x20004000, 0x08000000, 0x08040000, 4, p_2k, 0x08040800, 0x0804080F, 0x08040000, 0x08040800, 0},
{0x0, 0x0, 0x0, 0x0, 0x0, 0x0, nullptr, 0x0, 0x0, 0x0, 0x0, 0x0},
};
} // namespace esphome::shelly_dimmer
esphome/components/shelly_dimmer/shelly_dimmer.cpp
+1 -1
View File
@@ -176,7 +176,7 @@ bool ShellyDimmer::upgrade_firmware_() {
uint8_t buffer[BUFFER_SIZE];
const uint8_t *p = STM_FIRMWARE;
uint32_t offset = 0;
uint32_t addr = stm32->dev->fl_start;
uint32_t addr = stm32->dev.fl_start;
const uint32_t end = addr + STM_FIRMWARE_SIZE_IN_BYTES;
while (addr < end && offset < STM_FIRMWARE_SIZE_IN_BYTES) {
esphome/components/shelly_dimmer/stm32flash.cpp
+23 -14
View File
@@ -116,18 +116,25 @@ namespace esphome::shelly_dimmer {
namespace {
static uint32_t read_page_size(const uint32_t *psize) {
uint32_t size;
progmem_memcpy(&size, psize, sizeof(size));
return size;
}
int flash_addr_to_page_ceil(const stm32_unique_ptr &stm, uint32_t addr) {
if (!(addr >= stm->dev->fl_start && addr <= stm->dev->fl_end))
if (!(addr >= stm->dev.fl_start && addr <= stm->dev.fl_end))
return 0;
int page = 0;
addr -= stm->dev->fl_start;
const auto *psize = stm->dev->fl_ps;
addr -= stm->dev.fl_start;
const auto *psize = stm->dev.fl_ps;
while (addr >= psize[0]) {
addr -= psize[0];
uint32_t size;
while (addr >= (size = read_page_size(psize))) {
addr -= size;
page++;
if (psize[1])
if (read_page_size(psize + 1))
psize++;
}
@@ -637,14 +644,16 @@ stm32_unique_ptr stm32_init(uart::UARTDevice *stream, const uint8_t flags, const
return make_stm32_with_deletor(nullptr);
}
stm->dev = DEVICES;
while (stm->dev->id != 0x00 && stm->dev->id != stm->pid)
++stm->dev;
const stm32_dev_t *dev = DEVICES;
uint16_t id;
while ((id = progmem_read_uint16(&dev->id)) != 0x00 && id != stm->pid)
++dev;
if (!stm->dev->id) {
if (!id) {
ESP_LOGD(TAG, "Unknown/unsupported device (Device ID: 0x%03x)", stm->pid);
return make_stm32_with_deletor(nullptr);
}
progmem_memcpy(&stm->dev, dev, sizeof(stm->dev));
return stm;
}
@@ -821,10 +830,10 @@ stm32_err_t stm32_erase_memory(const stm32_unique_ptr &stm, uint32_t spage, uint
* a tentative of intrusion and will hang.
* Erasing the flash page-by-page is the safer way to go.
*/
if (!(stm->dev->flags & F_NO_ME))
if (!(stm->dev.flags & F_NO_ME))
return stm32_mass_erase(stm);
pages = flash_addr_to_page_ceil(stm, stm->dev->fl_end);
pages = flash_addr_to_page_ceil(stm, stm->dev.fl_end);
}
/*
@@ -913,9 +922,9 @@ stm32_err_t stm32_go(const stm32_unique_ptr &stm, const uint32_t address) {
}
stm32_err_t stm32_reset_device(const stm32_unique_ptr &stm) {
const auto target_address = stm->dev->ram_start;
const auto target_address = stm->dev.ram_start;
if (stm->dev->flags & F_OBLL) {
if (stm->dev.flags & F_OBLL) {
/* set the OBL_LAUNCH bit to reset device (see RM0360, 2.5) */
return stm32_run_raw_code(stm, target_address, STM_OBL_LAUNCH_CODE, STM_OBL_LAUNCH_CODE_SIZE);
} else {
esphome/components/shelly_dimmer/stm32flash.h
+8 -9
View File
@@ -73,15 +73,14 @@ using stm32_cmd_t = struct Stm32Cmd {
};
using stm32_dev_t = struct Stm32Dev { // NOLINT
const uint16_t id;
const char *name;
const uint32_t ram_start, ram_end;
const uint32_t fl_start, fl_end;
const uint16_t fl_pps; // pages per sector
uint16_t id;
uint32_t ram_start, ram_end;
uint32_t fl_start, fl_end;
uint16_t fl_pps; // pages per sector
const uint32_t *fl_ps; // page size
const uint32_t opt_start, opt_end;
const uint32_t mem_start, mem_end;
const uint32_t flags;
uint32_t opt_start, opt_end;
uint32_t mem_start, mem_end;
uint32_t flags;
};
using stm32_t = struct Stm32 {
@@ -93,7 +92,7 @@ using stm32_t = struct Stm32 {
uint8_t option1, option2;
uint16_t pid;
stm32_cmd_t *cmd;
const stm32_dev_t *dev;
stm32_dev_t dev; // RAM copy of the PROGMEM DEVICES entry
};
/*