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[psram] Fix ESP-IDF 6.0 compatibility for PSRAM sdkconfig options (#14794)

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Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
Jonathan Swoboda
2026-03-14 15:01:58 -04:00
committed by GitHub
parent 417858f098
commit 271b423b22
1 changed files with 12 additions and 7 deletions
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19
esphome/components/psram/__init__.py
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@@ -181,9 +181,6 @@ async def to_code(config):
if config[CONF_MODE] == TYPE_OCTAL:
cg.add_platformio_option("board_build.arduino.memory_type", "qio_opi")
add_idf_sdkconfig_option(
f"CONFIG_{get_esp32_variant().upper()}_SPIRAM_SUPPORT", True
)
add_idf_sdkconfig_option("CONFIG_SOC_SPIRAM_SUPPORTED", True)
add_idf_sdkconfig_option("CONFIG_SPIRAM", True)
add_idf_sdkconfig_option("CONFIG_SPIRAM_USE", True)
@@ -198,11 +195,19 @@ async def to_code(config):
speed = int(config[CONF_SPEED][:-3])
add_idf_sdkconfig_option(f"CONFIG_SPIRAM_SPEED_{speed}M", True)
add_idf_sdkconfig_option("CONFIG_SPIRAM_SPEED", speed)
if config[CONF_MODE] == TYPE_OCTAL and speed == 120:
add_idf_sdkconfig_option("CONFIG_ESPTOOLPY_FLASHFREQ_120M", True)
if CORE.data[KEY_CORE][KEY_FRAMEWORK_VERSION] >= cv.Version(5, 4, 0):
if speed == 120:
variant = get_esp32_variant()
# On chips with MSPI timing tuning, FLASH and PSRAM share the core
# clock so flash frequency must match PSRAM frequency.
# ESP32 and ESP32-S2 don't have this constraint.
if variant not in (VARIANT_ESP32, VARIANT_ESP32S2):
add_idf_sdkconfig_option("CONFIG_ESPTOOLPY_FLASHFREQ_120M", True)
if config[CONF_MODE] == TYPE_OCTAL and CORE.data[KEY_CORE][
KEY_FRAMEWORK_VERSION
] >= cv.Version(5, 4, 0):
add_idf_sdkconfig_option(
"CONFIG_SPIRAM_TIMING_TUNING_POINT_VIA_TEMPERATURE_SENSOR", True
"CONFIG_SPIRAM_TIMING_TUNING_POINT_VIA_TEMPERATURE_SENSOR",
True,
)
if config[CONF_ENABLE_ECC]:
add_idf_sdkconfig_option("CONFIG_SPIRAM_ECC_ENABLE", True)