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Merge branch 'rp2040-crash-handler' into integration
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@@ -8,8 +8,8 @@
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// Cortex-M0+ exception frame offsets (words)
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// When a fault occurs, the CPU pushes: R0, R1, R2, R3, R12, LR, PC, xPSR
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#define EF_LR 5
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#define EF_PC 6
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static constexpr uint32_t EF_LR = 5;
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static constexpr uint32_t EF_PC = 6;
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static constexpr uint32_t CRASH_MAGIC = 0xDEADBEEF;
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@@ -24,12 +24,13 @@ static constexpr uint32_t CRASH_MAGIC = 0xDEADBEEF;
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// [4..7] = up to 4 additional code addresses found by scanning the stack
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// (return addresses from callers, giving a deeper backtrace)
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// RP2040 flash is mapped at 0x10000000, code lives in first 1MB typically
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// RP2040 flash is mapped at 0x10000000 with up to 16MB address space.
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// We use 2MB as the upper bound — large enough for any typical ESPHome firmware
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// while keeping false positives low during stack scanning. Wider ranges would
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// match more stale data on the stack that happens to look like code addresses.
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static inline bool is_code_addr(uint32_t val) {
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// Thumb addresses have bit 0 set, but addr2line wants them without it.
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// Accept anything in flash range 0x10000000-0x10100000 (1MB)
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uint32_t cleared = val & ~1u;
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return cleared >= 0x10000000 && cleared < 0x10100000;
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uint32_t cleared = val & ~1u; // Clear Thumb bit
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return cleared >= 0x10000000 && cleared < 0x10200000;
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}
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static constexpr size_t MAX_BACKTRACE = 4;
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