diff --git a/esphome/core/component.cpp b/esphome/core/component.cpp
index c8875f0705..0154bd6735 100644
--- a/esphome/core/component.cpp
+++ b/esphome/core/component.cpp
@@ -315,7 +315,7 @@ void IRAM_ATTR HOT Component::enable_loop_soon_any_context() {
   // This method is thread and ISR-safe because:
   // 1. Only performs simple assignments to volatile variables (atomic on all platforms)
   // 2. No read-modify-write operations that could be interrupted
-  // 3. No memory allocation, object construction, or function calls
+  // 3. No memory allocation or object construction; the only call (wake_loop_any_context) is ISR-safe
   // 4. IRAM_ATTR ensures code is in IRAM, not flash (required for ISR execution)
   // 5. Components are never destroyed, so no use-after-free concerns
   // 6. App is guaranteed to be initialized before any ISR could fire
diff --git a/esphome/core/lwip_fast_select.c b/esphome/core/lwip_fast_select.c
index 370638a8e0..63a58b71e6 100644
--- a/esphome/core/lwip_fast_select.c
+++ b/esphome/core/lwip_fast_select.c
@@ -247,7 +247,7 @@ void IRAM_ATTR esphome_lwip_wake_main_loop_from_isr(int *px_higher_priority_task
 // Avoids depending on CMSIS __get_IPSR() which may not be declared/available
 // in all LibreTiny chip family toolchains (e.g. beken-72xx).
 static inline uint32_t esphome_get_ipsr(void) {
-  uint32_t ipsr;
+  uint32_t ipsr = 0;
   __asm volatile("mrs %0, ipsr" : "=r"(ipsr));
   return ipsr;
 }