diff --git a/esphome/components/libretiny/patch_linker.py.script b/esphome/components/libretiny/patch_linker.py.script
index ec16828450..96bad69971 100644
--- a/esphome/components/libretiny/patch_linker.py.script
+++ b/esphome/components/libretiny/patch_linker.py.script
@@ -131,19 +131,18 @@ def _pre_link(target, source, env):
     _patch_build_dir(_patchers, env.subst("$BUILD_DIR"))
 
 
-# Well-known ESPHome IRAM_ATTR symbols used as a fallback on RTL8720C, where
-# we cannot inject the __esphome_sram_text_start/end markers.
-_FALLBACK_IRAM_SYMBOLS = frozenset({
-    "_ZN7esphome21wake_loop_any_contextEv",
-    "_ZN7esphome17wake_loop_isrsafeEPl",
-    "_ZN7esphome9Component28enable_loop_soon_any_contextEv",
-})
+# Substrings matched against demangled symbol names as a fallback on
+# RTL8720C, where we cannot inject __esphome_sram_text_start/end markers.
+_FALLBACK_SUBSTRINGS = ("wake_loop_any_context", "wake_loop_isrsafe",
+                        "enable_loop_soon_any_context")
 
 
 def _collect_iram_symbols(nm, elf):
     """Return (start, end, fallback_addresses) for the IRAM_ATTR payload."""
     try:
-        out = subprocess.check_output([nm, "--defined-only", elf], text=True)
+        out = subprocess.check_output(
+            [nm, "--defined-only", "--demangle", elf], text=True
+        )
     except (OSError, subprocess.CalledProcessError):
         return None, None, []
     start = end = None
@@ -157,7 +156,7 @@ def _collect_iram_symbols(nm, elf):
             start = int(addr_str, 16)
         elif name == "__esphome_sram_text_end":
             end = int(addr_str, 16)
-        elif name in _FALLBACK_IRAM_SYMBOLS:
+        elif any(sub in name for sub in _FALLBACK_SUBSTRINGS):
             fallback.append(int(addr_str, 16))
     return start, end, fallback
 
diff --git a/esphome/core/hal.h b/esphome/core/hal.h
index c7d78589b4..d3bc97d9c3 100644
--- a/esphome/core/hal.h
+++ b/esphome/core/hal.h
@@ -72,10 +72,11 @@ __attribute__((always_inline)) inline bool in_isr_context() {
 #if defined(USE_ESP32)
   return xPortInIsrContext() != 0;
 #elif defined(USE_ESP8266)
-  // Xtensa LX106 PS.INTLEVEL[3:0]. Non-zero indicates interrupt in progress.
-  uint32_t ps;
-  __asm__ volatile("rsr.ps %0" : "=r"(ps));
-  return (ps & 0xF) != 0;
+  // ESP8266 has no reliable single-register ISR detection: PS.INTLEVEL is
+  // non-zero both in a real ISR and when user code masks interrupts.  The
+  // ESP8266 wake path is context-agnostic (wake_loop_impl uses esp_schedule
+  // which is ISR-safe) so this helper is unused on this platform.
+  return false;
 #elif defined(USE_RP2040)
   uint32_t ipsr;
   __asm__ volatile("mrs %0, ipsr" : "=r"(ipsr));