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[bridge] New component and cdc_acm_uart platform (#11689)
Co-authored-by: Jesse Hills <3060199+jesserockz@users.noreply.github.com> Co-authored-by: pre-commit-ci-lite[bot] <117423508+pre-commit-ci-lite[bot]@users.noreply.github.com> Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com> Co-authored-by: J. Nick Koston <nick@koston.org>
This commit is contained in:
co-authored by
Jesse Hills
pre-commit-ci-lite[bot]
Claude Fable 5.1
J. Nick Koston
parent
eecea15f4f
commit
ebb9037ea1
@@ -0,0 +1,154 @@
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"""Tests for the bridge cdc_acm_uart platform's final validation."""
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import pytest
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from esphome import config_validation as cv
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from esphome.components.cdc_acm_uart import bridge
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from esphome.components.cdc_acm_uart.bridge import CONF_USB_CDC_ACM_ID
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from esphome.config import Config
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from esphome.const import CONF_DEBUG, CONF_ID, CONF_UART_ID, PlatformFramework
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from esphome.core import ID
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from esphome.types import ConfigType
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from tests.component_tests.types import SetCoreConfigCallable
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_final_validate = bridge._final_validate
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def _set_esp32_s3(set_core_config: SetCoreConfigCallable, **kwargs) -> None:
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from esphome.components.esp32 import KEY_VARIANT, VARIANT_ESP32S3
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set_core_config(
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PlatformFramework.ESP32_IDF,
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platform_data={KEY_VARIANT: VARIANT_ESP32S3},
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**kwargs,
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)
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def _full_config(uarts: list[ConfigType] | None = None, **domains) -> Config:
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"""A full config declaring uart_0 and uart_1 (plus any extra entries), as the ID
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pass leaves it, so the debug check can resolve a uart_id to its declaration."""
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uarts = uarts or [{CONF_ID: ID("uart_0")}, {CONF_ID: ID("uart_1")}]
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full = Config()
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full["uart"] = uarts
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for index, uart_conf in enumerate(uarts):
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full.declare_ids.append((uart_conf[CONF_ID], ["uart", index, CONF_ID]))
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full.update(domains)
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return full
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def _bridge_config(uart_id: str, cdc_id: str) -> dict:
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return {CONF_UART_ID: ID(uart_id), CONF_USB_CDC_ACM_ID: ID(cdc_id)}
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def test_accepts_distinct_uart_and_cdc_interfaces(
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set_core_config: SetCoreConfigCallable,
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) -> None:
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_set_esp32_s3(set_core_config, full_config=_full_config())
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_final_validate(_bridge_config("uart_0", "cdc_acm_1"))
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_final_validate(_bridge_config("uart_1", "cdc_acm_2"))
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def test_rejects_two_bridges_sharing_a_uart(
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set_core_config: SetCoreConfigCallable,
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) -> None:
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_set_esp32_s3(set_core_config, full_config=_full_config())
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_final_validate(_bridge_config("uart_0", "cdc_acm_1"))
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with pytest.raises(cv.Invalid, match="already bridged"):
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_final_validate(_bridge_config("uart_0", "cdc_acm_2"))
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def test_rejects_two_bridges_sharing_a_cdc_interface(
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set_core_config: SetCoreConfigCallable,
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) -> None:
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_set_esp32_s3(set_core_config, full_config=_full_config())
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_final_validate(_bridge_config("uart_0", "cdc_acm_1"))
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with pytest.raises(cv.Invalid, match="already bridged"):
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_final_validate(_bridge_config("uart_1", "cdc_acm_1"))
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def test_rejects_uart_shared_with_another_component(
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set_core_config: SetCoreConfigCallable,
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) -> None:
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_set_esp32_s3(
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set_core_config,
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full_config=_full_config(
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sensor=[{"platform": "pzemac", CONF_UART_ID: ID("uart_0")}],
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),
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)
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with pytest.raises(cv.Invalid, match="exclusive"):
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_final_validate(_bridge_config("uart_0", "cdc_acm_1"))
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def test_rejects_cdc_interface_shared_with_another_component(
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set_core_config: SetCoreConfigCallable,
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) -> None:
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# The CDC instance is itself a uart::UARTComponent, so other components can bind
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# it as a plain UART via uart_id -- that must be rejected just like UART sharing.
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_set_esp32_s3(
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set_core_config,
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full_config=_full_config(
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sensor=[{"platform": "pzemac", CONF_UART_ID: ID("cdc_acm_1")}],
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),
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)
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with pytest.raises(cv.Invalid, match="exclusive"):
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_final_validate(_bridge_config("uart_0", "cdc_acm_1"))
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def test_rejects_uart_referenced_from_nested_config(
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set_core_config: SetCoreConfigCallable,
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) -> None:
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# References can sit arbitrarily deep, e.g. inside an automation's action list.
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_set_esp32_s3(
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set_core_config,
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full_config=_full_config(
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binary_sensor=[
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{
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"platform": "gpio",
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"on_press": [{"then": [{CONF_UART_ID: ID("uart_0")}]}],
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}
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],
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),
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)
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with pytest.raises(cv.Invalid, match="exclusive"):
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_final_validate(_bridge_config("uart_0", "cdc_acm_1"))
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def test_ignores_other_components_on_other_uarts(
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set_core_config: SetCoreConfigCallable,
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) -> None:
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_set_esp32_s3(
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set_core_config,
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full_config=_full_config(
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sensor=[{"platform": "pzemac", CONF_UART_ID: ID("uart_1")}],
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# The bridge domain itself is skipped: this bridge's own entry (and any
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# bridge-vs-bridge sharing, which the seen-set already rejects) must not
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# trip the exclusivity scan.
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bridge=[_bridge_config("uart_0", "cdc_acm_1")],
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),
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)
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_final_validate(_bridge_config("uart_0", "cdc_acm_1"))
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def test_rejects_debug_on_bridged_uart(
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set_core_config: SetCoreConfigCallable,
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) -> None:
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# The bridge talks to the IDF driver directly, so the uart debugger would see
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# nothing and its dummy_receiver would steal RX bytes.
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_set_esp32_s3(
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set_core_config,
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full_config=_full_config(uarts=[{CONF_ID: ID("uart_0"), CONF_DEBUG: {}}]),
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)
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with pytest.raises(cv.Invalid, match="debug"):
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_final_validate(_bridge_config("uart_0", "cdc_acm_1"))
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def test_allows_debug_on_other_uart(
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set_core_config: SetCoreConfigCallable,
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) -> None:
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_set_esp32_s3(
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set_core_config,
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full_config=_full_config(
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uarts=[{CONF_ID: ID("uart_0")}, {CONF_ID: ID("uart_1"), CONF_DEBUG: {}}]
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),
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)
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_final_validate(_bridge_config("uart_0", "cdc_acm_1"))
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@@ -60,7 +60,7 @@ def reset_core() -> Generator[None]:
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@pytest.fixture(autouse=True)
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def reset_full_config() -> Generator[None]:
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"""Give each test a clean final-validate config and restore it after."""
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token = final_validate.full_config.set({})
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token = final_validate.full_config.set(Config())
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yield
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final_validate.full_config.reset(token)
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@@ -75,7 +75,7 @@ def set_core_config() -> Generator[SetCoreConfigCallable]:
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*,
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core_data: ConfigType | None = None,
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platform_data: ConfigType | None = None,
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full_config: dict[str, ConfigType] | None = None,
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full_config: dict[str, ConfigType] | Config | None = None,
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) -> None:
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platform, framework = platform_framework.value
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@@ -94,7 +94,12 @@ def set_core_config() -> Generator[SetCoreConfigCallable]:
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CORE.data[platform.value] = platform_data
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config.path_context.set([])
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final_validate.full_config.set(full_config or Config())
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# Production always installs a Config (a FinalValidateConfig), never a plain dict.
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if not isinstance(full_config, Config):
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full = Config()
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full.update(full_config or {})
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full_config = full
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final_validate.full_config.set(full_config)
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yield setter
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@@ -4,6 +4,7 @@ from __future__ import annotations
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from typing import Protocol
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from esphome.config import Config
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from esphome.const import PlatformFramework
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from esphome.types import ConfigType
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@@ -18,5 +19,5 @@ class SetCoreConfigCallable(Protocol):
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*,
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core_data: ConfigType | None = None,
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platform_data: ConfigType | None = None,
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full_config: dict[str, ConfigType] | None = None,
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full_config: dict[str, ConfigType] | Config | None = None,
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) -> None: ...
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@@ -0,0 +1,18 @@
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tinyusb:
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id: tinyusb_test
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usb_lang_id: 0x0123
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usb_manufacturer_str: ESPHomeTestManufacturer
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usb_product_id: 0x1234
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usb_product_str: ESPHomeTestProduct
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usb_serial_str: ESPHomeTestSerialNumber
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usb_vendor_id: 0x2345
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uart:
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- id: uart_0
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tx_pin: 14
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rx_pin: 13
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baud_rate: 115200
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usb_cdc_acm:
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interfaces:
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- id: cdc_acm_1
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@@ -0,0 +1,12 @@
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# Second UART/CDC pair for a two-bridge setup. Kept out of common.yaml because the
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# ESP32-S2 has only two UART controllers and the logger occupies one, so a second
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# uart there would fail at runtime.
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uart:
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- id: uart_1
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tx_pin: 15
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rx_pin: 16
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baud_rate: 115200
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usb_cdc_acm:
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interfaces:
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- id: cdc_acm_2
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@@ -0,0 +1,15 @@
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packages:
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cdc_acm_uart: !include common.yaml
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cdc_acm_uart_dual: !include common_dual.yaml
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bridge:
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- platform: cdc_acm_uart
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uart_id: uart_0
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usb_cdc_acm_id: cdc_acm_1
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dtr_pin: 40
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rts_pin: 41
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- platform: cdc_acm_uart
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uart_id: uart_1
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usb_cdc_acm_id: cdc_acm_2
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dtr_pin: 20
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rts_pin: 21
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@@ -0,0 +1,14 @@
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# ESP32-S2 has no USB_SERIAL_JTAG, so the logger defaults to USB_CDC, which shares
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# the USB OTG peripheral with tinyusb. Use a hardware UART for logging instead.
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logger:
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hardware_uart: UART0
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packages:
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cdc_acm_uart: !include common.yaml
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bridge:
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- platform: cdc_acm_uart
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uart_id: uart_0
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usb_cdc_acm_id: cdc_acm_1
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dtr_pin: 40
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rts_pin: 41
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@@ -0,0 +1,17 @@
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packages:
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cdc_acm_uart: !include common.yaml
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cdc_acm_uart_dual: !include common_dual.yaml
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bridge:
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- platform: cdc_acm_uart
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uart_id: uart_0
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usb_cdc_acm_id: cdc_acm_1
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dtr_pin: 40
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rts_pin: 41
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- platform: cdc_acm_uart
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uart_id: uart_1
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usb_cdc_acm_id: cdc_acm_2
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# GPIO19/20 are USB D-/D+ on the S3 (which the CDC side itself uses); use
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# unrelated free pins here.
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dtr_pin: 17
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rts_pin: 18
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