diff --git a/esphome/components/socket/__init__.py b/esphome/components/socket/__init__.py
index a1e5d16036f..08cf3ea33c3 100644
--- a/esphome/components/socket/__init__.py
+++ b/esphome/components/socket/__init__.py
@@ -189,8 +189,9 @@ async def to_code(config):
         cg.add_define("USE_SOCKET_IMPL_BSD_SOCKETS")
         cg.add_define("USE_SOCKET_SELECT_SUPPORT")
     # ESP32 and LibreTiny both have LwIP >= 2.1.3 with lwip_socket_dbg_get_socket()
-    # and FreeRTOS task notifications — enable fast select to bypass lwip_select()
-    if CORE.is_esp32 or CORE.is_libretiny:
+    # and FreeRTOS task notifications — enable fast select to bypass lwip_select().
+    # Only when not using lwip_tcp, which does not provide select() support.
+    if (CORE.is_esp32 or CORE.is_libretiny) and impl != IMPLEMENTATION_LWIP_TCP:
         cg.add_build_flag("-DUSE_LWIP_FAST_SELECT")
 
 
diff --git a/esphome/core/lwip_fast_select.c b/esphome/core/lwip_fast_select.c
index 63a58b71e6b..a3cc6ab8fe1 100644
--- a/esphome/core/lwip_fast_select.c
+++ b/esphome/core/lwip_fast_select.c
@@ -246,7 +246,7 @@ void IRAM_ATTR esphome_lwip_wake_main_loop_from_isr(int *px_higher_priority_task
 // Read the ARM Cortex-M IPSR register directly via inline asm.
 // Avoids depending on CMSIS __get_IPSR() which may not be declared/available
 // in all LibreTiny chip family toolchains (e.g. beken-72xx).
-static inline uint32_t esphome_get_ipsr(void) {
+static inline IRAM_ATTR uint32_t esphome_get_ipsr(void) {
   uint32_t ipsr = 0;
   __asm volatile("mrs %0, ipsr" : "=r"(ipsr));
   return ipsr;