diff --git a/esphome/components/tas58xx/model_tas5805m.cpp b/esphome/components/tas58xx/model_tas5805m.cpp
index de0a0c5d75..09b369435e 100644
--- a/esphome/components/tas58xx/model_tas5805m.cpp
+++ b/esphome/components/tas58xx/model_tas5805m.cpp
@@ -15,9 +15,12 @@ static const uint8_t STARTUP_SEQUENCE[][2] PROGMEM = {
     {0x60, 0x01},  // ADR_PIN_CTRL: output
     {0x7D, 0x11},
     {0x7E, 0xFF},
-    {0x00, 0x01},
+    {0x00, 0x01},  // Page 1
     {0x51, 0x05},
-    {0x00, 0x00},
+    {0x00, 0x00},  // Page 0
+
+    // Additional register configuration
+    {0x53, 0x60},  // ANA_CTRL: for high audio performance use 175kHz bandwidth with Fsw=768kHz
 };
 
 static const LogString *model_name() { return LOG_STR("TAS5805M"); }
diff --git a/esphome/components/tas58xx/model_tas5825m.cpp b/esphome/components/tas58xx/model_tas5825m.cpp
index 3aa74c675e..cf5861cb4a 100644
--- a/esphome/components/tas58xx/model_tas5825m.cpp
+++ b/esphome/components/tas58xx/model_tas5825m.cpp
@@ -4,13 +4,11 @@
 
 namespace esphome::tas58xx {
 
-// Remainder of the startup sequence, run after the reset. Register 0x00 selects the page.
-// All writes except starting and last three register writes are exactly the startup sequence from TI PurePath Console.
-// Registers 0x46, 0x7D, 0x7E, page 1 register 0x51 and Page 2 registers 0x1D, 0x19 are not documented in the datasheet.
-
-// clang-format off
+// Remainder of the startup sequence, run after the reset in TAS58xx::init_(). Register 0x00 selects the page.
+// Based on the TI PurePath Console (PPC) export for "TAS5825M 2-Band DRC&AGL 2.0 96k".
+// Registers 0x46, 0x7D, 0x7E, page 1 register 0x51 and page 2 registers 0x1D, 0x19 are not documented in datasheet.
 static const uint8_t STARTUP_SEQUENCE[][2] PROGMEM = {
-    {0x03, 0x00},  // Deep Sleep
+    {0x03, 0x00},  // DEVICE_CTRL_2: deep sleep, the state the PPC sequence starts from
     {0x7D, 0x11},
     {0x7E, 0xFF},
     {0x00, 0x01},  // Page 1
@@ -20,15 +18,16 @@ static const uint8_t STARTUP_SEQUENCE[][2] PROGMEM = {
     {0x19, 0x80},
     {0x00, 0x00},  // Page 0
     {0x46, 0x11},
-    {0x02, 0x00},  // DEVICE_CTRL_1 - BD MODE, Damp to PBL MODE
-    {0x53, 0x01},  // ANA_CTRL PWM Phase Control - in phase
-    {0x54, 0x00},  // AGAIN 0dB
-    {0x03, 0x02},  // Hi-Z
-    {0x61, 0x0B},  // GPIO0_SEL - GPIO0 as FAULTZ output
-    {0x60, 0x01},  // GPIO0_OE - Enable GPIO0 as output
-    {0x77, 0x07},  // CBC_CONTROL enabling CBC function for warnings and faults
+    // PPC also writes 0x02 (DEVICE_CTRL_1) and 0x54 (AGAIN) here; init_() writes both from YAML
+    {0x53, 0x01},  // ANA_CTRL: in phase, 100kHz bandwidth for high audio performance with Fsw=384kHz
+    {0x03, 0x02},  // DEVICE_CTRL_2: Hi-Z
+
+    // Additional register configuration
+    // GPIO1 is a dedicated pin on TAS5825M (separate from ADR), used as FAULTZ
+    {0x62, 0x0B},  // GPIO1_SEL: GPIO1 as FAULTZ
+    {0x60, 0x02},  // GPIO_CTRL: GPIO1 is output
+    {0x77, 0x07},  // CBC_CONTROL: enable cycle-by-cycle current limit for warnings and faults
 };
-// clang-format on
 
 static const LogString *model_name() { return LOG_STR("TAS5825M"); }