diff --git a/esphome/components/libretiny/__init__.py b/esphome/components/libretiny/__init__.py
index 6b24f4d52c..21b176d5f0 100644
--- a/esphome/components/libretiny/__init__.py
+++ b/esphome/components/libretiny/__init__.py
@@ -471,7 +471,7 @@ async def component_to_code(config):
     # where the ISR-during-flash race is real (see esphome/core/hal.h). This
     # pre-link hook routes that section into each family's executable RAM:
     #   - LN882H: inject KEEP(*(.sram.text*)) into .flash_copysection.
-    #   - RTL8710B: inject KEEP(*(.sram.text*)) into .image2.ram.text.
+    #   - RTL8710B: inject KEEP(*(.sram.text*)) into .ram_image2.text.
     #   - RTL8720C: no-op (stock linker already consumes *(.sram.text*)).
     # BK72xx (all variants) is no-op: the Beken SDK wraps every flash write
     # in GLOBAL_INT_DISABLE() so no ISR can fire during a flash stall; the
@@ -565,8 +565,8 @@ async def component_to_code(config):
 
 # Called by writer.py
 def copy_files() -> None:
-    dir = Path(__file__).parent
-    patch_linker_file = dir / "patch_linker.py.script"
+    script_dir = Path(__file__).parent
+    patch_linker_file = script_dir / "patch_linker.py.script"
     copy_file_if_changed(
         patch_linker_file,
         CORE.relative_build_path("patch_linker.py"),
diff --git a/esphome/components/libretiny/patch_linker.py.script b/esphome/components/libretiny/patch_linker.py.script
index 63d95000b6..4e96064f93 100644
--- a/esphome/components/libretiny/patch_linker.py.script
+++ b/esphome/components/libretiny/patch_linker.py.script
@@ -13,8 +13,9 @@ import subprocess
 #
 # - LN882H: stock linker has ".flash_copysection" which is flash-to-RAM0
 #   copied at startup; inject "KEEP(*(.sram.text*))" there.
-# - RTL8710B (AmebaZ): stock linker has ".image2.ram.text" — inject
-#   "KEEP(*(.sram.text*))" into it.
+# - RTL8710B (AmebaZ): stock linker has ".ram_image2.text" output section
+#   (which already consumes *(.image2.ram.text*)) — inject
+#   "KEEP(*(.sram.text*))" into it as a second input glob.
 # - RTL8720C (AmebaZ2): stock linker already consumes "*(.sram.text*)",
 #   no-op. Loaded directly from the framework package so we cannot inject
 #   our __esphome_sram_text_start/end markers either; the post-link summary
@@ -119,7 +120,10 @@ def _patch_build_dir(patchers, build_dir):
         raise RuntimeError(
             "ESPHome: no linker script in {} was patched for IRAM_ATTR; refusing "
             "to link because IRAM_ATTR functions would end up in flash instead of "
-            "SRAM and would crash on an ISR while flash is busy".format(build_dir)
+            "SRAM and would crash on an ISR while flash is busy. LibreTiny probably "
+            "reformatted the target .ld template; update the per-family regex in "
+            "esphome/components/libretiny/patch_linker.py.script "
+            "(_LN_COPY, _RTL8710B_IMAGE2).".format(build_dir)
         )
 
 
diff --git a/esphome/core/hal.h b/esphome/core/hal.h
index 79eca8d5c3..c7d78589b4 100644
--- a/esphome/core/hal.h
+++ b/esphome/core/hal.h
@@ -26,7 +26,7 @@
 // IRAM_ATTR places a function in executable RAM so it is callable from an
 // ISR even while flash is busy (XIP stall, OTA, logger flash write).
 // patch_linker.py.script routes ".sram.text" into each family's RAM-
-// executable output section: .image2.ram.text on RTL8710B,
+// executable output section: .ram_image2.text on RTL8710B,
 // .flash_copysection on LN882H; RTL8720C's stock linker already consumes
 // *(.sram.text*) via its .ram.code_text output.
 //